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author | Craig Topper <craig.topper@intel.com> | 2018-12-24 19:40:20 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2018-12-24 19:40:20 +0000 |
commit | 0229da8f078a9b6fd82352d94c70b0531bca3d4f (patch) | |
tree | ef27583f65998195d8d54df4af20d5edf35b5646 /llvm/lib/CodeGen/SelectionDAG | |
parent | 6356ad940bc3aa7f98ddd4ab0a4feb00f12fe411 (diff) | |
download | bcm5719-llvm-0229da8f078a9b6fd82352d94c70b0531bca3d4f.tar.gz bcm5719-llvm-0229da8f078a9b6fd82352d94c70b0531bca3d4f.zip |
[X86] Use GetDemandedBits to simplify the operands of PMULDQ/PMULUDQ.
This is an alternative to what I attempted in D56057.
GetDemandedBits is a special version of SimplifyDemandedBits that allows simplifications even when the operand has other uses. GetDemandedBits will only do simplifications that allow a node to be bypassed. It won't create new nodes or alter any of the other users.
I had to add support for bypassing SIGN_EXTEND_INREG to GetDemandedBits.
Based on a patch that Simon Pilgrim sent me in email.
Fixes PR40142.
llvm-svn: 350059
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index b4947de31c9..f38770b773f 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -2118,6 +2118,15 @@ SDValue SelectionDAG::GetDemandedBits(SDValue V, const APInt &Mask) { return getNode(ISD::ANY_EXTEND, SDLoc(V), V.getValueType(), DemandedSrc); break; } + case ISD::SIGN_EXTEND_INREG: + EVT ExVT = cast<VTSDNode>(V.getOperand(1))->getVT(); + unsigned ExVTBits = ExVT.getScalarSizeInBits(); + + // If none of the extended bits are demanded, eliminate the sextinreg. + if (Mask.getActiveBits() <= ExVTBits) + return V.getOperand(0); + + break; } return SDValue(); } |