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| author | Pete Cooper <peter_cooper@apple.com> | 2011-11-15 21:57:53 +0000 |
|---|---|---|
| committer | Pete Cooper <peter_cooper@apple.com> | 2011-11-15 21:57:53 +0000 |
| commit | 7c7ba1baa1bb339273ee279083e99b7eddb0bf79 (patch) | |
| tree | 6ba77ab291331a84a5b32a2c247b0bdd237a08c0 /llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | |
| parent | 100d74e26778d29e502025773234571246d11d91 (diff) | |
| download | bcm5719-llvm-7c7ba1baa1bb339273ee279083e99b7eddb0bf79.tar.gz bcm5719-llvm-7c7ba1baa1bb339273ee279083e99b7eddb0bf79.zip | |
Added custom lowering for load->dec->store sequence in x86 when the EFLAGS registers is used
by later instructions.
Only done for DEC64m right now.
Fixes <rdar://problem/6172640>
llvm-svn: 144705
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index 7938a375050..5adbc0d6aa7 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -948,6 +948,11 @@ SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) { if (!TII->unfoldMemoryOperand(*DAG, N, NewNodes)) return NULL; + // unfolding an x86 DEC64m operation results in store, dec, load which + // can't be handled here so quit + if (NewNodes.size() == 3) + return NULL; + DEBUG(dbgs() << "Unfolding SU #" << SU->NodeNum << "\n"); assert(NewNodes.size() == 2 && "Expected a load folding node!"); |
