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authorEvan Cheng <evan.cheng@apple.com>2009-03-20 18:03:34 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-03-20 18:03:34 +0000
commit2e55923fba87e9f0f1b5841b6a164c207cc9004d (patch)
tree0ea18d2b90ffeaaaa94d20b5f79af1c562a69afa /llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
parent4ed32352c94037831355486bd6f449e77910e5e7 (diff)
downloadbcm5719-llvm-2e55923fba87e9f0f1b5841b6a164c207cc9004d.tar.gz
bcm5719-llvm-2e55923fba87e9f0f1b5841b6a164c207cc9004d.zip
For inline asm output operand that matches an input. Encode the input operand index in the high bits.
llvm-svn: 67387
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index b2f6ddf835a..7ae56d78499 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -632,7 +632,7 @@ bool ScheduleDAGRRList::DelayForLiveRegsBottomUp(SUnit *SU,
for (unsigned i = 2; i != NumOps;) {
unsigned Flags =
cast<ConstantSDNode>(Node->getOperand(i))->getZExtValue();
- unsigned NumVals = Flags >> 3;
+ unsigned NumVals = (Flags & 0xffff) >> 3;
++i; // Skip the ID value.
if ((Flags & 7) == 2 || (Flags & 7) == 6) {
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