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| author | Oliver Stannard <oliver.stannard@arm.com> | 2014-08-18 14:22:39 +0000 |
|---|---|---|
| committer | Oliver Stannard <oliver.stannard@arm.com> | 2014-08-18 14:22:39 +0000 |
| commit | f5469bec971db5da35e09961287469896d662bdc (patch) | |
| tree | 79ad042d1dd60dfce1eedf0e3a4c1e1398f72ba9 /llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | |
| parent | 12993dd916d4b1bbe7eb60e4a4b031f3dc760424 (diff) | |
| download | bcm5719-llvm-f5469bec971db5da35e09961287469896d662bdc.tar.gz bcm5719-llvm-f5469bec971db5da35e09961287469896d662bdc.zip | |
Teach the AArch64 backend to handle f16
This allows the AArch64 backend to handle fadd, fsub, fmul and fdiv
operations on f16 (half-precision) types by promoting to f32.
llvm-svn: 215891
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp')
0 files changed, 0 insertions, 0 deletions
