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author | Nick Lewycky <nicholas@mxc.ca> | 2012-02-24 07:59:05 +0000 |
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committer | Nick Lewycky <nicholas@mxc.ca> | 2012-02-24 07:59:05 +0000 |
commit | e839e2895f641207b42d1855f758fefff8c20c0a (patch) | |
tree | 8713f2befc060588b27754142809d163c73d16cc /llvm/lib/CodeGen/ScheduleDAGInstrs.h | |
parent | 093d4be5504f118a05a6c140eda38aa8924e7cb6 (diff) | |
download | bcm5719-llvm-e839e2895f641207b42d1855f758fefff8c20c0a.tar.gz bcm5719-llvm-e839e2895f641207b42d1855f758fefff8c20c0a.zip |
ScheduleDAGInstrs.h:155: warning: suggest parentheses around `&&' within `||'.
llvm-svn: 151355
Diffstat (limited to 'llvm/lib/CodeGen/ScheduleDAGInstrs.h')
-rw-r--r-- | llvm/lib/CodeGen/ScheduleDAGInstrs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/ScheduleDAGInstrs.h b/llvm/lib/CodeGen/ScheduleDAGInstrs.h index 1a9d1ea5789..c7ffed96b78 100644 --- a/llvm/lib/CodeGen/ScheduleDAGInstrs.h +++ b/llvm/lib/CodeGen/ScheduleDAGInstrs.h @@ -152,7 +152,7 @@ namespace llvm { /// Otherwise map the register and return an empty SUnits vector. std::vector<SUnit *> &operator[](unsigned Reg) { bool New = PhysRegSet.insert(Reg).second; - assert(!New || SUnits[Reg].empty() && "stale SUnits vector"); + assert((!New || SUnits[Reg].empty()) && "stale SUnits vector"); (void)New; return SUnits[Reg]; } |