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| author | Owen Anderson <resistor@mac.com> | 2008-07-23 19:47:27 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2008-07-23 19:47:27 +0000 |
| commit | 7c800ad977248601263bec5ac46969ddabf1535f (patch) | |
| tree | f895db3916a2fc836c6fcf7c6328c0dbd0d6c845 /llvm/lib/CodeGen/RegAllocLinearScan.cpp | |
| parent | ae187c6ebadd1146a4bdf4a12217e80d45073a23 (diff) | |
| download | bcm5719-llvm-7c800ad977248601263bec5ac46969ddabf1535f.tar.gz bcm5719-llvm-7c800ad977248601263bec5ac46969ddabf1535f.zip | |
Fix a compile-time regression introduced by my heuristic-changing patch. I forgot
to multiply the instruction count by a constant factor in a few places, which
caused the register allocator to require many more iterations.
llvm-svn: 53959
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocLinearScan.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/RegAllocLinearScan.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/RegAllocLinearScan.cpp b/llvm/lib/CodeGen/RegAllocLinearScan.cpp index 4df172d40c7..ad830b25352 100644 --- a/llvm/lib/CodeGen/RegAllocLinearScan.cpp +++ b/llvm/lib/CodeGen/RegAllocLinearScan.cpp @@ -852,7 +852,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) // All registers must have inf weight. Just grab one! minReg = BestPhysReg ? BestPhysReg : *RC->allocation_order_begin(*mf_); if (cur->weight == HUGE_VALF || - li_->getApproximateInstructionCount(*cur) == 1) + li_->getApproximateInstructionCount(*cur) == 0) // Spill a physical register around defs and uses. li_->spillPhysRegAroundRegDefsUses(*cur, minReg, *vrm_); } |
