From 7c800ad977248601263bec5ac46969ddabf1535f Mon Sep 17 00:00:00 2001 From: Owen Anderson Date: Wed, 23 Jul 2008 19:47:27 +0000 Subject: Fix a compile-time regression introduced by my heuristic-changing patch. I forgot to multiply the instruction count by a constant factor in a few places, which caused the register allocator to require many more iterations. llvm-svn: 53959 --- llvm/lib/CodeGen/RegAllocLinearScan.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'llvm/lib/CodeGen/RegAllocLinearScan.cpp') diff --git a/llvm/lib/CodeGen/RegAllocLinearScan.cpp b/llvm/lib/CodeGen/RegAllocLinearScan.cpp index 4df172d40c7..ad830b25352 100644 --- a/llvm/lib/CodeGen/RegAllocLinearScan.cpp +++ b/llvm/lib/CodeGen/RegAllocLinearScan.cpp @@ -852,7 +852,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) // All registers must have inf weight. Just grab one! minReg = BestPhysReg ? BestPhysReg : *RC->allocation_order_begin(*mf_); if (cur->weight == HUGE_VALF || - li_->getApproximateInstructionCount(*cur) == 1) + li_->getApproximateInstructionCount(*cur) == 0) // Spill a physical register around defs and uses. li_->spillPhysRegAroundRegDefsUses(*cur, minReg, *vrm_); } -- cgit v1.2.3