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| author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-11-12 23:26:35 +0000 |
|---|---|---|
| committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-11-12 23:26:35 +0000 |
| commit | 6e9422e14c816ab6cdc691989bb7d42a19b28fa3 (patch) | |
| tree | 04dd9f5f8b228f6c32bd5c85e361bbae9abc18d9 /llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp | |
| parent | 4b9c46da246442b679cff6bd2c84fea56113b850 (diff) | |
| download | bcm5719-llvm-6e9422e14c816ab6cdc691989bb7d42a19b28fa3.tar.gz bcm5719-llvm-6e9422e14c816ab6cdc691989bb7d42a19b28fa3.zip | |
When allocating space on stack for writing a register,
use the size of the register, not the size of the Value type,
to get the right alignment.
llvm-svn: 1284
Diffstat (limited to 'llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp index bc825657344..9133da5df49 100644 --- a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp +++ b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp @@ -528,8 +528,10 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR, int SpillOff = LR->getSpillOffFromFP(); RegClass *RC = LR->getRegClass(); const LiveVarSet *LVSetBef = LVI->getLiveVarSetBeforeMInst(MInst, BB); + + /**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/ int TmpOff = - mcInfo.pushTempValue(TM, TM.findOptimalStorageSize(LR->getType())); + mcInfo.pushTempValue(TM, 8 /* TM.findOptimalStorageSize(LR->getType()) */); MachineInstr *MIBef=NULL, *AdIMid=NULL, *MIAft=NULL; int TmpReg; |
