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authorVikram S. Adve <vadve@cs.uiuc.edu>2001-11-12 23:26:35 +0000
committerVikram S. Adve <vadve@cs.uiuc.edu>2001-11-12 23:26:35 +0000
commit6e9422e14c816ab6cdc691989bb7d42a19b28fa3 (patch)
tree04dd9f5f8b228f6c32bd5c85e361bbae9abc18d9 /llvm
parent4b9c46da246442b679cff6bd2c84fea56113b850 (diff)
downloadbcm5719-llvm-6e9422e14c816ab6cdc691989bb7d42a19b28fa3.tar.gz
bcm5719-llvm-6e9422e14c816ab6cdc691989bb7d42a19b28fa3.zip
When allocating space on stack for writing a register,
use the size of the register, not the size of the Value type, to get the right alignment. llvm-svn: 1284
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp4
-rw-r--r--llvm/lib/Target/Sparc/Sparc.cpp16
-rw-r--r--llvm/lib/Target/Sparc/SparcInternals.h2
-rw-r--r--llvm/lib/Target/Sparc/SparcRegInfo.cpp12
4 files changed, 24 insertions, 10 deletions
diff --git a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
index bc825657344..9133da5df49 100644
--- a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
+++ b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
@@ -528,8 +528,10 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
int SpillOff = LR->getSpillOffFromFP();
RegClass *RC = LR->getRegClass();
const LiveVarSet *LVSetBef = LVI->getLiveVarSetBeforeMInst(MInst, BB);
+
+ /**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
int TmpOff =
- mcInfo.pushTempValue(TM, TM.findOptimalStorageSize(LR->getType()));
+ mcInfo.pushTempValue(TM, 8 /* TM.findOptimalStorageSize(LR->getType()) */);
MachineInstr *MIBef=NULL, *AdIMid=NULL, *MIAft=NULL;
int TmpReg;
diff --git a/llvm/lib/Target/Sparc/Sparc.cpp b/llvm/lib/Target/Sparc/Sparc.cpp
index b6bf94f81e3..20bad83dfc6 100644
--- a/llvm/lib/Target/Sparc/Sparc.cpp
+++ b/llvm/lib/Target/Sparc/Sparc.cpp
@@ -193,7 +193,8 @@ UltraSparcSchedInfo::initializeResources()
//
// Purpose:
// Interface to stack frame layout info for the UltraSPARC.
-// Note that there is no machine-independent interface to this information
+// Starting offsets for each area of the stack frame are aligned at
+// a multiple of getStackFrameSizeAlignment().
//---------------------------------------------------------------------------
int
@@ -210,7 +211,9 @@ UltraSparcFrameInfo::getRegSpillAreaOffset(MachineCodeForMethod& mcInfo,
{
pos = false; // static stack area grows downwards
unsigned int autoVarsSize = mcInfo.getAutomaticVarsSize();
- return StaticAreaOffsetFromFP - autoVarsSize;
+ if (int mod = autoVarsSize % getStackFrameSizeAlignment())
+ autoVarsSize += (getStackFrameSizeAlignment() - mod);
+ return StaticAreaOffsetFromFP - autoVarsSize;
}
int
@@ -220,7 +223,10 @@ UltraSparcFrameInfo::getTmpAreaOffset(MachineCodeForMethod& mcInfo,
pos = false; // static stack area grows downwards
unsigned int autoVarsSize = mcInfo.getAutomaticVarsSize();
unsigned int spillAreaSize = mcInfo.getRegSpillsSize();
- return StaticAreaOffsetFromFP - (autoVarsSize + spillAreaSize);
+ int offset = autoVarsSize + spillAreaSize;
+ if (int mod = offset % getStackFrameSizeAlignment())
+ offset += (getStackFrameSizeAlignment() - mod);
+ return StaticAreaOffsetFromFP - offset;
}
int
@@ -229,7 +235,9 @@ UltraSparcFrameInfo::getDynamicAreaOffset(MachineCodeForMethod& mcInfo,
{
// dynamic stack area grows downwards starting at top of opt-args area
unsigned int optArgsSize = mcInfo.getMaxOptionalArgsSize();
- return optArgsSize + FirstOptionalOutgoingArgOffsetFromSP;
+ int offset = optArgsSize + FirstOptionalOutgoingArgOffsetFromSP;
+ assert(offset % getStackFrameSizeAlignment() == 0);
+ return offset;
}
diff --git a/llvm/lib/Target/Sparc/SparcInternals.h b/llvm/lib/Target/Sparc/SparcInternals.h
index 9b8fe177ef2..53a4beb6cec 100644
--- a/llvm/lib/Target/Sparc/SparcInternals.h
+++ b/llvm/lib/Target/Sparc/SparcInternals.h
@@ -1211,6 +1211,8 @@ protected:
//
// Purpose:
// Interface to stack frame layout info for the UltraSPARC.
+// Starting offsets for each area of the stack frame are aligned at
+// a multiple of getStackFrameSizeAlignment().
//---------------------------------------------------------------------------
class UltraSparcFrameInfo: public MachineFrameInfo {
diff --git a/llvm/lib/Target/Sparc/SparcRegInfo.cpp b/llvm/lib/Target/Sparc/SparcRegInfo.cpp
index 16e3b9f0380..e59a3ab2b41 100644
--- a/llvm/lib/Target/Sparc/SparcRegInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcRegInfo.cpp
@@ -709,9 +709,9 @@ void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
int TReg = PRA.getRegNotUsedByThisInst( LR->getRegClass(), CallMI );
- int TmpOff = PRA.mcInfo.pushTempValue(target,
- target.findOptimalStorageSize(LR->getType()));
- // getStackOffsets().getNewTmpPosOffFromFP();
+ /**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
+ int TmpOff = PRA.mcInfo.pushTempValue(target, 8);
+ // target.findOptimalStorageSize(LR->getType()));
int argOffset = PRA.mcInfo.allocateOptionalArg(target, LR->getType());
@@ -1174,8 +1174,9 @@ void UltraSparcRegInfo::insertCallerSavingCode(const MachineInstr *MInst,
// and add them to InstrnsBefore and InstrnsAfter of the
// call instruction
- int StackOff = PRA.mcInfo.pushTempValue(target,
- target.findOptimalStorageSize(LR->getType()));
+ /**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
+ int StackOff = PRA.mcInfo.pushTempValue(target, 8);
+ // target.findOptimalStorageSize(LR->getType()));
MachineInstr *AdIBefCC, *AdIAftCC, *AdICpCC;
MachineInstr *AdIBef, *AdIAft;
@@ -1548,6 +1549,7 @@ void UltraSparcRegInfo::moveInst2OrdVec(vector<MachineInstr *> &OrdVec,
MachineInstr *AdIBef, *AdIAft;
// TODO: Change 8 below
+ /**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
const int StackOff = PRA.mcInfo.pushTempValue(target, 8);
// Save the UReg (%ox) on stack before it's destroyed
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