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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-08-29 01:58:21 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-08-29 01:58:21 +0000 |
| commit | eea72ccbf2d8379a04b7783bc6a72a69ad5dface (patch) | |
| tree | de1a1677c16ed72c704482112d5c65ba3cb996c8 /llvm/lib/CodeGen/OptimizePHIs.cpp | |
| parent | b8ce14c4c3bc634e9610ddda8970b1208d2c5526 (diff) | |
| download | bcm5719-llvm-eea72ccbf2d8379a04b7783bc6a72a69ad5dface.tar.gz bcm5719-llvm-eea72ccbf2d8379a04b7783bc6a72a69ad5dface.zip | |
AMDGPU/SI: Fix some invaild assumptions when folding 64-bit immediates
Summary:
We were assuming tha if the use operand had a sub-register that
the immediate was 64-bits, but this was breaking the case of
folding a 64-bit immediate into another 64-bit instruction.
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D12255
llvm-svn: 246354
Diffstat (limited to 'llvm/lib/CodeGen/OptimizePHIs.cpp')
0 files changed, 0 insertions, 0 deletions
