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| author | Oren Ben Simhon <oren.ben.simhon@intel.com> | 2017-03-16 08:15:52 +0000 |
|---|---|---|
| committer | Oren Ben Simhon <oren.ben.simhon@intel.com> | 2017-03-16 08:15:52 +0000 |
| commit | da59ffae91e6fb7c82cb1a753779e3421a9071dc (patch) | |
| tree | dd1b7e7b721492b79b64b699fd3cd166129d4880 /llvm/lib/CodeGen/MachineRegisterInfo.cpp | |
| parent | 04bbda99233eacd70acab095a750fb415b755826 (diff) | |
| download | bcm5719-llvm-da59ffae91e6fb7c82cb1a753779e3421a9071dc.tar.gz bcm5719-llvm-da59ffae91e6fb7c82cb1a753779e3421a9071dc.zip | |
Fixing typos.
llvm-svn: 297932
Diffstat (limited to 'llvm/lib/CodeGen/MachineRegisterInfo.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineRegisterInfo.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp index 91bb5d93dde..e4f73cf30e5 100644 --- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp +++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp @@ -44,7 +44,7 @@ void MachineRegisterInfo::Delegate::anchor() {} MachineRegisterInfo::MachineRegisterInfo(MachineFunction *MF) : MF(MF), TracksSubRegLiveness(MF->getSubtarget().enableSubRegLiveness() && EnableSubRegLiveness), - IsUpdatedCSRsInitizialied(false) { + IsUpdatedCSRsInitialized(false) { unsigned NumRegs = getTargetRegisterInfo()->getNumRegs(); VRegInfo.reserve(256); RegAllocHints.reserve(256); @@ -564,7 +564,7 @@ void MachineRegisterInfo::disableCalleeSavedRegister(unsigned Reg) { assert(Reg && (Reg < TRI->getNumRegs()) && "Trying to disable an invalid register"); - if (!IsUpdatedCSRsInitizialied) { + if (!IsUpdatedCSRsInitialized) { const MCPhysReg *CSR = TRI->getCalleeSavedRegs(MF); for (const MCPhysReg *I = CSR; *I; ++I) UpdatedCSRs.push_back(*I); @@ -573,7 +573,7 @@ void MachineRegisterInfo::disableCalleeSavedRegister(unsigned Reg) { // (no more registers should be pushed). UpdatedCSRs.push_back(0); - IsUpdatedCSRsInitizialied = true; + IsUpdatedCSRsInitialized = true; } // Remove the register (and its aliases from the list). @@ -583,8 +583,9 @@ void MachineRegisterInfo::disableCalleeSavedRegister(unsigned Reg) { } const MCPhysReg *MachineRegisterInfo::getCalleeSavedRegs() const { - if (IsUpdatedCSRsInitizialied) + if (IsUpdatedCSRsInitialized) return UpdatedCSRs.data(); return getTargetRegisterInfo()->getCalleeSavedRegs(MF); } + |
