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authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-06-02 23:07:20 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-06-02 23:07:20 +0000
commit75703ca76f57b604ca517d4fc765ea4db074296a (patch)
treef2c6c9e33e7000cedb41bdccfe5e51ebf181a002 /llvm/lib/CodeGen/MachineRegisterInfo.cpp
parent8a71c0b771527e7f94a37b17f376ab40daa43c75 (diff)
downloadbcm5719-llvm-75703ca76f57b604ca517d4fc765ea4db074296a.tar.gz
bcm5719-llvm-75703ca76f57b604ca517d4fc765ea4db074296a.zip
Make it possible to have unallocatable register classes.
Some register classes are only used for instruction operand constraints. They should never be used for virtual registers. Previously, those register classes were given an empty allocation order, but now you can say 'let isAllocatable=0' in the register class definition. TableGen calculates if a register is part of any allocatable register class, and makes that information available in TargetRegisterDesc::inAllocatableClass. The goal here is to eliminate use cases for overriding allocation_order_* methods. llvm-svn: 132508
Diffstat (limited to 'llvm/lib/CodeGen/MachineRegisterInfo.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineRegisterInfo.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
index 7244d5f03a9..08ff5bb7152 100644
--- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp
+++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
@@ -79,6 +79,8 @@ MachineRegisterInfo::constrainRegClass(unsigned Reg,
unsigned
MachineRegisterInfo::createVirtualRegister(const TargetRegisterClass *RegClass){
assert(RegClass && "Cannot create register without RegClass!");
+ assert(RegClass->isAllocatable() &&
+ "Virtual register RegClass must be allocatable.");
// New virtual register number.
unsigned Reg = TargetRegisterInfo::index2VirtReg(getNumVirtRegs());
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