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authorJakob Stoklund Olesen <stoklund@2pi.dk>2010-10-06 23:54:39 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2010-10-06 23:54:39 +0000
commit18842783cc0d442d292ae4fd40c8c04c4e8702c4 (patch)
tree197b956577cda297942463d6aceec442914dfbd7 /llvm/lib/CodeGen/MachineRegisterInfo.cpp
parent1a065e4e5bdce8287977fb076bdeb3e070368902 (diff)
downloadbcm5719-llvm-18842783cc0d442d292ae4fd40c8c04c4e8702c4.tar.gz
bcm5719-llvm-18842783cc0d442d292ae4fd40c8c04c4e8702c4.zip
Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE.
This function is intended to be used when inserting a machine instruction that trivially restricts the legal registers, like LEA requiring a GR32_NOSP argument. llvm-svn: 115875
Diffstat (limited to 'llvm/lib/CodeGen/MachineRegisterInfo.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineRegisterInfo.cpp14
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
index 5d852f26bed..7b839f07e73 100644
--- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp
+++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
@@ -60,6 +60,20 @@ MachineRegisterInfo::setRegClass(unsigned Reg, const TargetRegisterClass *RC) {
RegClass2VRegMap[RC->getID()].push_back(VR);
}
+const TargetRegisterClass *
+MachineRegisterInfo::constrainRegClass(unsigned Reg,
+ const TargetRegisterClass *RC) {
+ const TargetRegisterClass *OldRC = getRegClass(Reg);
+ if (OldRC == RC)
+ return RC;
+ const TargetRegisterClass *NewRC = getCommonSubClass(OldRC, RC);
+ if (!NewRC)
+ return 0;
+ if (NewRC != OldRC)
+ setRegClass(Reg, NewRC);
+ return NewRC;
+}
+
/// createVirtualRegister - Create and return a new virtual register in the
/// function with the specified register class.
///
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