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authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-09-22 21:39:31 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-09-22 21:39:31 +0000
commit0f36544c08a75430752acd23b357ed4f7d3febdf (patch)
tree657e52d59a63bf89058617e199e0c2604025181a /llvm/lib/CodeGen/MachineRegisterInfo.cpp
parent16abd328f5e0b44cbfed7a4935709a00316cc89f (diff)
downloadbcm5719-llvm-0f36544c08a75430752acd23b357ed4f7d3febdf.tar.gz
bcm5719-llvm-0f36544c08a75430752acd23b357ed4f7d3febdf.zip
Add a MinNumRegs argument to MRI::constrainRegClass().
The function will refuse to use a register class with fewer registers than MinNumRegs. This can be used by clients to avoid accidentally increase register pressure too much. The default value of MinNumRegs=0 doesn't affect how constrainRegClass() works. llvm-svn: 140339
Diffstat (limited to 'llvm/lib/CodeGen/MachineRegisterInfo.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineRegisterInfo.cpp10
1 files changed, 6 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
index d7953896be1..d513f29e7c1 100644
--- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp
+++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
@@ -49,15 +49,17 @@ MachineRegisterInfo::setRegClass(unsigned Reg, const TargetRegisterClass *RC) {
const TargetRegisterClass *
MachineRegisterInfo::constrainRegClass(unsigned Reg,
- const TargetRegisterClass *RC) {
+ const TargetRegisterClass *RC,
+ unsigned MinNumRegs) {
const TargetRegisterClass *OldRC = getRegClass(Reg);
if (OldRC == RC)
return RC;
const TargetRegisterClass *NewRC = getCommonSubClass(OldRC, RC);
- if (!NewRC)
+ if (!NewRC || NewRC == OldRC)
+ return NewRC;
+ if (NewRC->getNumRegs() < MinNumRegs)
return 0;
- if (NewRC != OldRC)
- setRegClass(Reg, NewRC);
+ setRegClass(Reg, NewRC);
return NewRC;
}
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