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| author | Evan Cheng <evan.cheng@apple.com> | 2009-06-14 20:22:55 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-06-14 20:22:55 +0000 |
| commit | 085caf10beed56dade58b0c99331a5c249bb878a (patch) | |
| tree | 643e91bdaed07ceb15d2ef2e507b58ef78dbd091 /llvm/lib/CodeGen/MachineRegisterInfo.cpp | |
| parent | 45da0c90134e1c93a087351b7ede9d6ed69fc250 (diff) | |
| download | bcm5719-llvm-085caf10beed56dade58b0c99331a5c249bb878a.tar.gz bcm5719-llvm-085caf10beed56dade58b0c99331a5c249bb878a.zip | |
Move register allocation preference (or hint) from LiveInterval to MachineRegisterInfo. This allows more passes to set them.
llvm-svn: 73346
Diffstat (limited to 'llvm/lib/CodeGen/MachineRegisterInfo.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineRegisterInfo.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp index 4f5ab1f5860..9649c4c44ce 100644 --- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp +++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp @@ -16,6 +16,7 @@ using namespace llvm; MachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI) { VRegInfo.reserve(256); + RegAllocHints.reserve(256); RegClass2VRegMap.resize(TRI.getNumRegClasses()+1); // RC ID starts at 1. UsedPhysRegs.resize(TRI.getNumRegs()); @@ -64,6 +65,7 @@ MachineRegisterInfo::createVirtualRegister(const TargetRegisterClass *RegClass){ // Add a reg, but keep track of whether the vector reallocated or not. void *ArrayBase = VRegInfo.empty() ? 0 : &VRegInfo[0]; VRegInfo.push_back(std::make_pair(RegClass, (MachineOperand*)0)); + RegAllocHints.push_back(std::make_pair(RA_None, 0)); if (!((&VRegInfo[0] == ArrayBase || VRegInfo.size() == 1))) // The vector reallocated, handle this now. |

