[CodeGen] Print live-out register lists as liveout(...) in both MIR and debug output

Work towards the unification of MIR and debug output by printing
`liveout(...)` instead of `<regliveout>`.

Only debug syntax is affected.

llvm-svn: 320683

1 files changed, 18 insertions, 2 deletions

diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp
index 7ffdbea08c1..009722b981a 100644
--- a/llvm/lib/CodeGen/MachineOperand.cpp
+++ b/llvm/lib/CodeGen/MachineOperand.cpp
@@ -637,9 +637,25 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
     OS << ">";
     break;
   }
-  case MachineOperand::MO_RegisterLiveOut:
-    OS << "<regliveout>";
+  case MachineOperand::MO_RegisterLiveOut: {
+    const uint32_t *RegMask = getRegLiveOut();
+    OS << "liveout(";
+    if (!TRI) {
+      OS << "<unknown>";
+    } else {
+      bool IsCommaNeeded = false;
+      for (unsigned Reg = 0, E = TRI->getNumRegs(); Reg < E; ++Reg) {
+        if (RegMask[Reg / 32] & (1U << (Reg % 32))) {
+          if (IsCommaNeeded)
+            OS << ", ";
+          OS << printReg(Reg, TRI);
+          IsCommaNeeded = true;
+        }
+      }
+    }
+    OS << ")";
     break;
+  }
   case MachineOperand::MO_Metadata:
     OS << '<';
     getMetadata()->printAsOperand(OS, MST);