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authorPekka Jaaskelainen <pekka.jaaskelainen@tut.fi>2013-10-15 14:18:10 +0000
committerPekka Jaaskelainen <pekka.jaaskelainen@tut.fi>2013-10-15 14:18:10 +0000
commiteb08e2e0c85ed7fd6050886f5ca0107ad63d9bb2 (patch)
tree69c221780491cc321d478c99f7f8df80a5a14321 /llvm/lib/CodeGen/MachineInstr.cpp
parent67a1eef05b3bc1265ce821a9c4fca7b6a41878ce (diff)
downloadbcm5719-llvm-eb08e2e0c85ed7fd6050886f5ca0107ad63d9bb2.tar.gz
bcm5719-llvm-eb08e2e0c85ed7fd6050886f5ca0107ad63d9bb2.zip
Do not assert when trying to add a meta data operand with
MachineInstr::addOperand(). llvm-svn: 192707
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineInstr.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index a123e36e96b..488516385d7 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -647,11 +647,12 @@ void MachineInstr::addOperand(MachineFunction &MF, const MachineOperand &Op) {
}
}
+ bool isMetaDataOp = Op.getType() == MachineOperand::MO_Metadata;
// OpNo now points as the desired insertion point. Unless this is a variadic
// instruction, only implicit regs are allowed beyond MCID->getNumOperands().
// RegMask operands go between the explicit and implicit operands.
assert((isImpReg || Op.isRegMask() || MCID->isVariadic() ||
- OpNo < MCID->getNumOperands()) &&
+ OpNo < MCID->getNumOperands() || isMetaDataOp) &&
"Trying to add an operand to a machine instr that is already done!");
MachineRegisterInfo *MRI = getRegInfo();
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