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authorMatt Arsenault <Matthew.Arsenault@amd.com>2017-07-20 00:37:31 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2017-07-20 00:37:31 +0000
commitd62fe83005cae1c370570a5e49b902d81648958b (patch)
treedeecadd32bdb1b8de29db4d377ad12f68c85bb68 /llvm/lib/CodeGen/MachineInstr.cpp
parent15cc3713d359ed7dd7d40bf85b444531401feacd (diff)
downloadbcm5719-llvm-d62fe83005cae1c370570a5e49b902d81648958b.tar.gz
bcm5719-llvm-d62fe83005cae1c370570a5e49b902d81648958b.zip
Replace -print-whole-regmask with a threshold.
The previous flag/default of printing everything is not helpful when there are thousands of registers in the mask. llvm-svn: 308572
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineInstr.cpp13
1 files changed, 8 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index afea5575a3a..017352abb32 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -73,10 +73,12 @@
using namespace llvm;
-static cl::opt<bool> PrintWholeRegMask(
- "print-whole-regmask",
- cl::desc("Print the full contents of regmask operands in IR dumps"),
- cl::init(true), cl::Hidden);
+static cl::opt<int> PrintRegMaskNumRegs(
+ "print-regmask-num-regs",
+ cl::desc("Number of registers to limit to when "
+ "printing regmask operands in IR dumps. "
+ "unlimited = -1"),
+ cl::init(32), cl::Hidden);
//===----------------------------------------------------------------------===//
// MachineOperand Implementation
@@ -503,7 +505,8 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
unsigned MaskWord = i / 32;
unsigned MaskBit = i % 32;
if (getRegMask()[MaskWord] & (1 << MaskBit)) {
- if (PrintWholeRegMask || NumRegsEmitted <= 10) {
+ if (PrintRegMaskNumRegs < 0 ||
+ NumRegsEmitted <= static_cast<unsigned>(PrintRegMaskNumRegs)) {
OS << " " << PrintReg(i, TRI);
NumRegsEmitted++;
}
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