Allow explicit physical registers for implicit operands.

llvm-svn: 6468

1 files changed, 11 insertions, 1 deletions

diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index a7a6988fccf..ffb2ae9c4e0 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -23,6 +23,7 @@ extern const TargetInstrDescriptor *TargetInstrDescriptors;
 // Constructor for instructions with variable #operands
 MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned  numOperands)
   : opCode(OpCode),
+    opCodeFlags(0),
     operands(numOperands, MachineOperand()),
     numImplicitRefs(0)
 {
@@ -36,6 +37,7 @@ MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned  numOperands)
 MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands,
                            bool XX, bool YY)
   : opCode(Opcode),
+    opCodeFlags(0),
     numImplicitRefs(0)
 {
   operands.reserve(numOperands);
@@ -47,6 +49,7 @@ MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands,
 MachineInstr::MachineInstr(MachineBasicBlock *MBB, MachineOpCode Opcode,
                            unsigned numOperands)
   : opCode(Opcode),
+    opCodeFlags(0),
     numImplicitRefs(0)
 {
   assert(MBB && "Cannot use inserting ctor with null basic block!");
@@ -60,7 +63,7 @@ bool MachineInstr::OperandsComplete() const
 {
   int NumOperands = TargetInstrDescriptors[opCode].numOperands;
   if (NumOperands >= 0 && getNumOperands() >= (unsigned)NumOperands)
-    return true;  // Broken!
+    return true;  // Broken: we have all the operands of this instruction!
   return false;
 }
 
@@ -141,6 +144,13 @@ MachineInstr::SetRegForOperand(unsigned i, int regNum)
   insertUsedReg(regNum);
 }
 
+void
+MachineInstr::SetRegForImplicitRef(unsigned i, int regNum)
+{
+  getImplicitOp(i).setRegForValue(regNum);
+  insertUsedReg(regNum);
+}
+
 
 // Subsitute all occurrences of Value* oldVal with newVal in all operands
 // and all implicit refs.  If defsOnly == true, substitute defs only.