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author | Chris Lattner <sabre@nondot.org> | 2001-09-10 19:43:38 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2001-09-10 19:43:38 +0000 |
commit | acfa5076633e549913844b2d066b3f2205f4d3a0 (patch) | |
tree | 4e7bd39b43504b4e4646077d306523a100259c3d /llvm/lib/CodeGen/MachineInstr.cpp | |
parent | da9755002f3ab593b745dd055f4c3ff1ad66aac7 (diff) | |
download | bcm5719-llvm-acfa5076633e549913844b2d066b3f2205f4d3a0.tar.gz bcm5719-llvm-acfa5076633e549913844b2d066b3f2205f4d3a0.zip |
Fix a bug I introduced (assertion failed: Unknown operand type), and convert to predicate style for type checks
llvm-svn: 531
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineInstr.cpp | 27 |
1 files changed, 11 insertions, 16 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index 7a5214d260d..63acea14b41 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -127,17 +127,12 @@ ostream &operator<<(ostream &os, const MachineOperand &mop) { case MachineOperand::MO_CCRegister: os << "%ccreg"; return OutputOperand(os, mop); - case MachineOperand::MO_SignExtendedImmed: return os << mop.immedVal; - case MachineOperand::MO_UnextendedImmed: return os << mop.immedVal; - case MachineOperand::MO_PCRelativeDisp: - os << "%disp(label "; - return OutputOperand(os, mop) << ")"; - + return os << "%disp(label " << mop.getVRegValue() << ")"; default: assert(0 && "Unrecognized operand type"); break; @@ -212,12 +207,12 @@ Set3OperandsFromInstrJUNK(MachineInstr* minstr, minstr->SetMachineOperand(op1Position, /*regNum*/ target.zeroRegNum); else { - if (op1Value->getValueType() == Value::ConstantVal) - {// value is constant and must be loaded from constant pool - returnFlags = returnFlags | (1 << op1Position); - } - minstr->SetMachineOperand(op1Position,MachineOperand::MO_VirtualRegister, - op1Value); + if (op1Value->isConstant()) { + // value is constant and must be loaded from constant pool + returnFlags = returnFlags | (1 << op1Position); + } + minstr->SetMachineOperand(op1Position, MachineOperand::MO_VirtualRegister, + op1Value); } // Check if operand 2 (if any) fits in the immed. field of the instruction, @@ -237,10 +232,10 @@ Set3OperandsFromInstrJUNK(MachineInstr* minstr, minstr->SetMachineOperand(op2Position, machineRegNum); else if (op2type == MachineOperand::MO_VirtualRegister) { - if (op2Value->getValueType() == Value::ConstantVal) - {// value is constant and must be loaded from constant pool - returnFlags = returnFlags | (1 << op2Position); - } + if (op2Value->isConstant()) { + // value is constant and must be loaded from constant pool + returnFlags = returnFlags | (1 << op2Position); + } minstr->SetMachineOperand(op2Position, op2type, op2Value); } else |