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authorTim Northover <tnorthover@apple.com>2016-07-20 19:09:30 +0000
committerTim Northover <tnorthover@apple.com>2016-07-20 19:09:30 +0000
commit62ae568bbb9c4d22d341a71d12ab0bc74506476c (patch)
tree3f97084359b5198bb5223ea2c93d9b01cc608be0 /llvm/lib/CodeGen/MachineInstr.cpp
parent228d27c70f4ba3f32f07719c9a299fd7d7db2d5b (diff)
downloadbcm5719-llvm-62ae568bbb9c4d22d341a71d12ab0bc74506476c.tar.gz
bcm5719-llvm-62ae568bbb9c4d22d341a71d12ab0bc74506476c.zip
GlobalISel: implement low-level type with just size & vector lanes.
This should be all the low-level instruction selection needs to determine how to implement an operation, with the remaining context taken from the opcode (e.g. G_ADD vs G_FADD) or other flags not based on type (e.g. fast-math). llvm-svn: 276158
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineInstr.cpp18
1 files changed, 9 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 3cdf8d2941d..2ccfe259e9c 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -656,7 +656,7 @@ MachineInstr::MachineInstr(MachineFunction &MF, const MCInstrDesc &tid,
debugLoc(std::move(dl))
#ifdef LLVM_BUILD_GLOBAL_ISEL
,
- Ty(nullptr)
+ Ty(LLT{})
#endif
{
assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
@@ -680,7 +680,7 @@ MachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI)
MemRefs(MI.MemRefs), debugLoc(MI.getDebugLoc())
#ifdef LLVM_BUILD_GLOBAL_ISEL
,
- Ty(nullptr)
+ Ty(LLT{})
#endif
{
assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
@@ -710,18 +710,18 @@ MachineRegisterInfo *MachineInstr::getRegInfo() {
// The proper implementation is WIP and is tracked here:
// PR26576.
#ifndef LLVM_BUILD_GLOBAL_ISEL
-void MachineInstr::setType(Type *Ty) {}
+void MachineInstr::setType(LLT Ty) {}
-Type *MachineInstr::getType() const { return nullptr; }
+LLT MachineInstr::getType() const { return LLT{}; }
#else
-void MachineInstr::setType(Type *Ty) {
- assert((!Ty || isPreISelGenericOpcode(getOpcode())) &&
+void MachineInstr::setType(LLT Ty) {
+ assert((!Ty.isValid() || isPreISelGenericOpcode(getOpcode())) &&
"Non generic instructions are not supposed to be typed");
this->Ty = Ty;
}
-Type *MachineInstr::getType() const { return Ty; }
+LLT MachineInstr::getType() const { return Ty; }
#endif // LLVM_BUILD_GLOBAL_ISEL
/// RemoveRegOperandsFromUseLists - Unlink all of the register operands in
@@ -1724,9 +1724,9 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
else
OS << "UNKNOWN";
- if (getType()) {
+ if (getType().isValid()) {
OS << ' ';
- getType()->print(OS, /*IsForDebug*/ false, /*NoDetails*/ true);
+ getType().print(OS);
OS << ' ';
}
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