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| author | Vladimir Stefanovic <vladimir.stefanovic@rt-rk.com> | 2019-01-17 21:50:37 +0000 |
|---|---|---|
| committer | Vladimir Stefanovic <vladimir.stefanovic@rt-rk.com> | 2019-01-17 21:50:37 +0000 |
| commit | 3daf8bc96a121279030e93f4462ff4daa1ffa8e4 (patch) | |
| tree | 7223dfc35cd801163135f03f5d479623c660d2e3 /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | 73b51ae160af6b94d4468331ff3fb6855cff3b18 (diff) | |
| download | bcm5719-llvm-3daf8bc96a121279030e93f4462ff4daa1ffa8e4.tar.gz bcm5719-llvm-3daf8bc96a121279030e93f4462ff4daa1ffa8e4.zip | |
[mips] Emit .reloc R_{MICRO}MIPS_JALR along with j(al)r(c) $25
The callee address is added as an optional operand (MCSymbol) in
AdjustInstrPostInstrSelection() and then used by asm printer to insert:
'.reloc tmplabel, R_MIPS_JALR, symbol
tmplabel:'.
Controlled with '-mips-jalr-reloc', default is true.
Differential revision: https://reviews.llvm.org/D56694
llvm-svn: 351485
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineInstr.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index 764a84c7e13..dc1ad953e71 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -225,12 +225,13 @@ void MachineInstr::addOperand(MachineFunction &MF, const MachineOperand &Op) { } #ifndef NDEBUG - bool isMetaDataOp = Op.getType() == MachineOperand::MO_Metadata; + bool isDebugOp = Op.getType() == MachineOperand::MO_Metadata || + Op.getType() == MachineOperand::MO_MCSymbol; // OpNo now points as the desired insertion point. Unless this is a variadic // instruction, only implicit regs are allowed beyond MCID->getNumOperands(). // RegMask operands go between the explicit and implicit operands. assert((isImpReg || Op.isRegMask() || MCID->isVariadic() || - OpNo < MCID->getNumOperands() || isMetaDataOp) && + OpNo < MCID->getNumOperands() || isDebugOp) && "Trying to add an operand to a machine instr that is already done!"); #endif |
