summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/CodeGenPrepare.cpp
diff options
context:
space:
mode:
authorCullen Rhodes <cullen.rhodes@arm.com>2019-05-24 08:45:37 +0000
committerCullen Rhodes <cullen.rhodes@arm.com>2019-05-24 08:45:37 +0000
commitd9bb7b69abe266ab8d3ba54186604af9cc8750ad (patch)
treec45874c8eec14898980dbf76491b67da4143a80d /llvm/lib/CodeGen/CodeGenPrepare.cpp
parent3b2157aeed845b0cf70f38cf7d3b29da50291cf8 (diff)
downloadbcm5719-llvm-d9bb7b69abe266ab8d3ba54186604af9cc8750ad.tar.gz
bcm5719-llvm-d9bb7b69abe266ab8d3ba54186604af9cc8750ad.zip
[AArch64][SVE2] Asm: fix overlapping bit
Summary: Bit 20 in sve2_int_arith_pred TableGen class was overlapping. The encodings are not affected as bit 20 is defined by the opc bits and this was overwriting the earlier error of setting bit 20 to 0. Raised by Momchil: https://reviews.llvm.org/D62130 Reviewed By: chill Differential Revision: https://reviews.llvm.org/D62292 llvm-svn: 361609
Diffstat (limited to 'llvm/lib/CodeGen/CodeGenPrepare.cpp')
0 files changed, 0 insertions, 0 deletions
OpenPOWER on IntegriCloud