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| author | Cullen Rhodes <cullen.rhodes@arm.com> | 2019-05-24 08:45:37 +0000 |
|---|---|---|
| committer | Cullen Rhodes <cullen.rhodes@arm.com> | 2019-05-24 08:45:37 +0000 |
| commit | d9bb7b69abe266ab8d3ba54186604af9cc8750ad (patch) | |
| tree | c45874c8eec14898980dbf76491b67da4143a80d /llvm | |
| parent | 3b2157aeed845b0cf70f38cf7d3b29da50291cf8 (diff) | |
| download | bcm5719-llvm-d9bb7b69abe266ab8d3ba54186604af9cc8750ad.tar.gz bcm5719-llvm-d9bb7b69abe266ab8d3ba54186604af9cc8750ad.zip | |
[AArch64][SVE2] Asm: fix overlapping bit
Summary:
Bit 20 in sve2_int_arith_pred TableGen class was overlapping. The
encodings are not affected as bit 20 is defined by the opc bits
and this was overwriting the earlier error of setting bit 20 to 0.
Raised by Momchil: https://reviews.llvm.org/D62130
Reviewed By: chill
Differential Revision: https://reviews.llvm.org/D62292
llvm-svn: 361609
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/AArch64/SVEInstrFormats.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/SVEInstrFormats.td b/llvm/lib/Target/AArch64/SVEInstrFormats.td index 79f2dab932f..ac4d800197b 100644 --- a/llvm/lib/Target/AArch64/SVEInstrFormats.td +++ b/llvm/lib/Target/AArch64/SVEInstrFormats.td @@ -2070,7 +2070,7 @@ class sve2_int_arith_pred<bits<2> sz, bits<6> opc, string asm, bits<5> Zdn; let Inst{31-24} = 0b01000100; let Inst{23-22} = sz; - let Inst{21-20} = 0b01; + let Inst{21} = 0b0; let Inst{20-16} = opc{5-1}; let Inst{15-14} = 0b10; let Inst{13} = opc{0}; |
