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| author | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2018-06-21 18:36:04 +0000 |
|---|---|---|
| committer | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2018-06-21 18:36:04 +0000 |
| commit | 766c77efd7ec420583458d2f0726f42058109383 (patch) | |
| tree | 7c399365d1dcd3f4ea9e20327c5e1f7b4ce76ab1 /llvm/docs/AMDGPUUsage.rst | |
| parent | 3382dc644e86cded3e6b6e6069c8cc4e484886a7 (diff) | |
| download | bcm5719-llvm-766c77efd7ec420583458d2f0726f42058109383.tar.gz bcm5719-llvm-766c77efd7ec420583458d2f0726f42058109383.zip | |
AMDGPU/AMDHSA: Remove GridWorkGroupCountX/Y/Z
and everything that comes with it from implementation
and v3 header files.
Leave definition in v2 header files for backwards
compatibility.
Differential Revision: https://reviews.llvm.org/D48191
llvm-svn: 335267
Diffstat (limited to 'llvm/docs/AMDGPUUsage.rst')
| -rw-r--r-- | llvm/docs/AMDGPUUsage.rst | 11 |
1 files changed, 2 insertions, 9 deletions
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst index 5c1430732c1..0f60d4995c7 100644 --- a/llvm/docs/AMDGPUUsage.rst +++ b/llvm/docs/AMDGPUUsage.rst @@ -1667,15 +1667,8 @@ CP microcode requires the Kernel descritor to be allocated on 64 byte alignment. 453 1 bit ENABLE_SGPR_FLAT_SCRATCH_INIT *see above* 454 1 bit ENABLE_SGPR_PRIVATE_SEGMENT *see above* _SIZE - 455 1 bit ENABLE_SGPR_GRID_WORKGROUP Not implemented in CP and - _COUNT_X should always be 0. - 456 1 bit ENABLE_SGPR_GRID_WORKGROUP Not implemented in CP and - _COUNT_Y should always be 0. - 457 1 bit ENABLE_SGPR_GRID_WORKGROUP Not implemented in CP and - _COUNT_Z should always be 0. - 463:458 6 bits Reserved, must be 0. - 511:464 6 Reserved, must be 0. - bytes + 455 1 bit Reserved, must be 0. + 511:456 8 bytes Reserved, must be 0. 512 **Total size 64 bytes.** ======= ==================================================================== |
