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| author | Oliver Stannard <oliver.stannard@arm.com> | 2014-10-01 09:03:02 +0000 |
|---|---|---|
| committer | Oliver Stannard <oliver.stannard@arm.com> | 2014-10-01 09:03:02 +0000 |
| commit | bfd3ea32b7d58eb3815bad2a46897f02dcee46bb (patch) | |
| tree | 4352bf80a0b41f40923f516a3db1bad5dd989a9a /lldb/test/functionalities/object-file/TestImageListMultiArchitecture.py | |
| parent | 37e4daab05c9fd2848e0cb55f6e39e9697745b3d (diff) | |
| download | bcm5719-llvm-bfd3ea32b7d58eb3815bad2a46897f02dcee46bb.tar.gz bcm5719-llvm-bfd3ea32b7d58eb3815bad2a46897f02dcee46bb.zip | |
[ARM] Add support for Cortex-M7, FPv5-SP and FPv5-DP
The Cortex-M7 has 3 options for its FPU: none, FPv5-SP-D16 and
FPv5-DP-D16. FPv5 has the same instructions as FP-ARMv8, so it can be
modeled using the same target feature, and all double-precision
operations are already disabled by the fp-only-sp target features.
llvm-svn: 218748
Diffstat (limited to 'lldb/test/functionalities/object-file/TestImageListMultiArchitecture.py')
0 files changed, 0 insertions, 0 deletions
