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| author | Oliver Stannard <oliver.stannard@arm.com> | 2014-10-01 09:02:17 +0000 |
|---|---|---|
| committer | Oliver Stannard <oliver.stannard@arm.com> | 2014-10-01 09:02:17 +0000 |
| commit | 37e4daab05c9fd2848e0cb55f6e39e9697745b3d (patch) | |
| tree | ebaa61a77b1f51d56719fcd27e87105e43c6d48a /lldb/test/functionalities/object-file/TestImageListMultiArchitecture.py | |
| parent | 79dc4420f0106dbc466f00d806484adc9aa8c630 (diff) | |
| download | bcm5719-llvm-37e4daab05c9fd2848e0cb55f6e39e9697745b3d.tar.gz bcm5719-llvm-37e4daab05c9fd2848e0cb55f6e39e9697745b3d.zip | |
[ARM] Add support for Cortex-M7, FPv5-SP and FPv5-DP (LLVM)
The Cortex-M7 has 3 options for its FPU: none, FPv5-SP-D16 and
FPv5-DP-D16. FPv5 has the same instructions as FP-ARMv8, so it can be
modelled using the same target feature, and all double-precision
operations are already disabled by the fp-only-sp target features.
llvm-svn: 218747
Diffstat (limited to 'lldb/test/functionalities/object-file/TestImageListMultiArchitecture.py')
0 files changed, 0 insertions, 0 deletions
