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authorStefan Maksimovic <stefan.maksimovic@mips.com>2018-02-08 09:25:17 +0000
committerStefan Maksimovic <stefan.maksimovic@mips.com>2018-02-08 09:25:17 +0000
commitb3e7ed3b941b3477b7797860eb99cb5154ba015e (patch)
tree0ad069284c49ea0e3c4cea9eeed2db247febe326 /lldb/packages/Python/lldbsuite/test/python_api/symbol-context/TestSymbolContext.py
parent820553fdb1e0cb49ac99a66bc5fd078283bb1a60 (diff)
downloadbcm5719-llvm-b3e7ed3b941b3477b7797860eb99cb5154ba015e.tar.gz
bcm5719-llvm-b3e7ed3b941b3477b7797860eb99cb5154ba015e.zip
[mips] Define certain instructions in microMIPS32r3
Instructions affected: mthc1, mfhc1, add.d, sub.d, mul.d, div.d, mov.d, neg.d, cvt.w.d, cvt.d.s, cvt.d.w, cvt.s.d These instructions are now defined for microMIPS32r3 + microMIPS32r6 in MicroMipsInstrFPU.td since they shared their encoding with those already defined in microMIPS32r6InstrInfo.td and have been therefore removed from the latter file. Some instructions present in MicroMipsInstrFPU.td which did not have both AFGR64 and FGR64 variants defined have been altered to do so. Differential revision: https://reviews.llvm.org/D42738 llvm-svn: 324584
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/python_api/symbol-context/TestSymbolContext.py')
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