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| author | Yi Kong <Yi.Kong@arm.com> | 2014-07-17 12:45:17 +0000 |
|---|---|---|
| committer | Yi Kong <Yi.Kong@arm.com> | 2014-07-17 12:45:17 +0000 |
| commit | 28d7b026873670ff533bf250a72125bce25af84d (patch) | |
| tree | 204bf8eaa2835880e0310828b2864776a58a7565 /clang/test | |
| parent | 5c37d70e9ed4e5cd0da0d0f074c9ed76697cad52 (diff) | |
| download | bcm5719-llvm-28d7b026873670ff533bf250a72125bce25af84d.tar.gz bcm5719-llvm-28d7b026873670ff533bf250a72125bce25af84d.zip | |
ARM: Add ACLE memory barrier intrinsic mapping
llvm-svn: 213261
Diffstat (limited to 'clang/test')
| -rw-r--r-- | clang/test/CodeGen/arm_acle.c | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/clang/test/CodeGen/arm_acle.c b/clang/test/CodeGen/arm_acle.c index 41ebe1504c5..e4d795a1542 100644 --- a/clang/test/CodeGen/arm_acle.c +++ b/clang/test/CodeGen/arm_acle.c @@ -3,8 +3,30 @@ #include <arm_acle.h> -/* Hints */ +/* 8 SYNCHRONIZATION, BARRIER AND HINT INTRINSICS */ +/* 8.3 Memory Barriers */ +// ARM-LABEL: test_dmb +// AArch32: call void @llvm.arm.dmb(i32 1) +// AArch64: call void @llvm.aarch64.dmb(i32 1) +void test_dmb(void) { + __dmb(1); +} + +// ARM-LABEL: test_dsb +// AArch32: call void @llvm.arm.dsb(i32 2) +// AArch64: call void @llvm.aarch64.dsb(i32 2) +void test_dsb(void) { + __dsb(2); +} + +// ARM-LABEL: test_isb +// AArch32: call void @llvm.arm.isb(i32 3) +// AArch64: call void @llvm.aarch64.isb(i32 3) +void test_isb(void) { + __isb(3); +} +/* 8.4 Hints */ // ARM-LABEL: test_yield // AArch32: call void @llvm.arm.hint(i32 1) // AArch64: call void @llvm.aarch64.hint(i32 1) |
