diff options
| author | Benjamin Kramer <benny.kra@googlemail.com> | 2015-07-20 15:31:17 +0000 |
|---|---|---|
| committer | Benjamin Kramer <benny.kra@googlemail.com> | 2015-07-20 15:31:17 +0000 |
| commit | b5960564133b8794fc1065869b9e2d4fbf6530ea (patch) | |
| tree | 78b947610bc46d7186498bd43564d86a30dcac23 /clang/test/CodeGen | |
| parent | 25b2f754b57a376b958e9b13f82c114e4d3c5b00 (diff) | |
| download | bcm5719-llvm-b5960564133b8794fc1065869b9e2d4fbf6530ea.tar.gz bcm5719-llvm-b5960564133b8794fc1065869b9e2d4fbf6530ea.zip | |
[CodeGen] Flip lanes when lowering __builtin_palignr with one lane
Otherwise we'd pick the wrong lane for the resulting shuffle and
miscompile code. PR24187.
llvm-svn: 242678
Diffstat (limited to 'clang/test/CodeGen')
| -rw-r--r-- | clang/test/CodeGen/palignr.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/clang/test/CodeGen/palignr.c b/clang/test/CodeGen/palignr.c index 1712df5256c..5a77597c340 100644 --- a/clang/test/CodeGen/palignr.c +++ b/clang/test/CodeGen/palignr.c @@ -4,13 +4,13 @@ #define _mm_alignr_epi8(a, b, n) (__builtin_ia32_palignr128((a), (b), (n))) typedef __attribute__((vector_size(16))) int int4; -// CHECK: palignr +// CHECK: palignr $15, %xmm1, %xmm0 int4 align1(int4 a, int4 b) { return _mm_alignr_epi8(a, b, 15); } // CHECK: ret // CHECK: ret // CHECK-NOT: palignr int4 align2(int4 a, int4 b) { return _mm_alignr_epi8(a, b, 16); } -// CHECK: psrldq +// CHECK: psrldq $1, %xmm0 int4 align3(int4 a, int4 b) { return _mm_alignr_epi8(a, b, 17); } // CHECK: xor int4 align4(int4 a, int4 b) { return _mm_alignr_epi8(a, b, 32); } |

