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author | Eric Christopher <echristo@gmail.com> | 2015-08-27 19:59:34 +0000 |
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committer | Eric Christopher <echristo@gmail.com> | 2015-08-27 19:59:34 +0000 |
commit | 3a98b3c1a5af22396e457d3232d74690f2ed4532 (patch) | |
tree | 2fbd78a256e66305243edf8284b29796e9d57d4a /clang/test/CodeGen/attr-target.c | |
parent | 5e93e28d8b88ba30613c2bb1d55a7e5b75749626 (diff) | |
download | bcm5719-llvm-3a98b3c1a5af22396e457d3232d74690f2ed4532.tar.gz bcm5719-llvm-3a98b3c1a5af22396e457d3232d74690f2ed4532.zip |
Rewrite the code generation handling for function feature and cpu attributes.
A couple of changes here:
a) Do less work in the case where we don't have a target attribute on the
function. We've already canonicalized the attributes for the function -
no need to do more work.
b) Use the newer canonicalized feature adding functions from TargetInfo
to do the work when we do have a target attribute. This enables us to diagnose
some warnings in the case of conflicting written attributes (only ppc does
this today) and also make sure to get all of the features for a cpu that's
listed rather than just change the cpu.
Updated all testcases accordingly and added a new testcase to verify that we'll
error out on ppc if we have some incompatible options using the existing diagnosis
framework there.
llvm-svn: 246195
Diffstat (limited to 'clang/test/CodeGen/attr-target.c')
-rw-r--r-- | clang/test/CodeGen/attr-target.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/clang/test/CodeGen/attr-target.c b/clang/test/CodeGen/attr-target.c index d805d133f36..b02dd719650 100644 --- a/clang/test/CodeGen/attr-target.c +++ b/clang/test/CodeGen/attr-target.c @@ -14,6 +14,7 @@ int __attribute__((target("sse4"))) panda(int a) { return 4; } int bar(int a) { return baz(a) + foo(a); } int __attribute__((target("avx, sse4.2, arch= ivybridge"))) qux(int a) { return 4; } +int __attribute__((target("mno-aes, arch=ivybridge"))) qax(int a) { return 4; } // Check that we emit the additional subtarget and cpu features for foo and not for baz or bar. // CHECK: baz{{.*}} #0 @@ -25,7 +26,9 @@ int __attribute__((target("avx, sse4.2, arch= ivybridge"))) qux(int // CHECK: echidna{{.*}} #2 // CHECK: bar{{.*}} #0 // CHECK: qux{{.*}} #1 +// CHECK: qax{{.*}} #4 // CHECK: #0 = {{.*}}"target-cpu"="x86-64" "target-features"="+sse,+sse2" -// CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3" +// CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+aes,+avx,+cx16,+f16c,+fsgsbase,+pclmul,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3" // CHECK: #2 = {{.*}}"target-cpu"="x86-64" "target-features"="+sse,-aes,-avx,-avx2,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512pf,-avx512vl,-f16c,-fma,-fma4,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-xop" // CHECK: #3 = {{.*}}"target-cpu"="x86-64" "target-features"="+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3" +// CHECK: #4 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cx16,+f16c,+fsgsbase,+pclmul,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,-aes" |