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authorChad Rosier <mcrosier@codeaurora.org>2017-04-20 18:50:21 +0000
committerChad Rosier <mcrosier@codeaurora.org>2017-04-20 18:50:21 +0000
commit9f25dd56a8ba3df8eb52278a82c25f660785e0b4 (patch)
treea13e0c330c5f9b9f640da8b1004bc2e260c78f8b
parent962c5a3aec056a74facf2a4fb8766d071e33aaf3 (diff)
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[AArch64] Improve scheduling of logical operations on Falkor.
llvm-svn: 300871
-rw-r--r--llvm/lib/Target/AArch64/AArch64SchedFalkorDetails.td6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SchedFalkorDetails.td b/llvm/lib/Target/AArch64/AArch64SchedFalkorDetails.td
index 6bce4ef6b65..4bd77d34448 100644
--- a/llvm/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+++ b/llvm/lib/Target/AArch64/AArch64SchedFalkorDetails.td
@@ -265,6 +265,12 @@ def : InstRW<[FalkorWr_2LD_2VXVY_2LD_1XYZ_2VXVY_4cyc, WriteAdr],(instregex "^LD4
// Arithmetic and Logical Instructions
// -----------------------------------------------------------------------------
def : InstRW<[FalkorWr_ADD], (instregex "^ADD(S)?(W|X)r(s|x)$")>;
+def : InstRW<[FalkorWr_1XYZ_1cyc], (instregex "^AND(S)?(W|X)r(i|r|s)$")>;
+def : InstRW<[FalkorWr_1XYZ_1cyc], (instregex "^BIC(S)?(W|X)r(r|s)$")>;
+def : InstRW<[FalkorWr_1XYZ_1cyc], (instregex "^EON(W|X)r(r|s)$")>;
+def : InstRW<[FalkorWr_1XYZ_1cyc], (instregex "^EOR(W|X)r(i|r|s)$")>;
+def : InstRW<[FalkorWr_1XYZ_1cyc], (instregex "^ORN(W|X)r(r|s)$")>;
+def : InstRW<[FalkorWr_1XYZ_1cyc], (instregex "^ORR(W|X)r(i|r|s)$")>;
def : InstRW<[FalkorWr_2XYZ_2cyc], (instregex "^SUB(S)?(W|X)r(s|x)$")>;
// SIMD Miscellaneous Instructions
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