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| author | Weiming Zhao <weimingz@codeaurora.org> | 2017-04-20 18:37:14 +0000 |
|---|---|---|
| committer | Weiming Zhao <weimingz@codeaurora.org> | 2017-04-20 18:37:14 +0000 |
| commit | 962c5a3aec056a74facf2a4fb8766d071e33aaf3 (patch) | |
| tree | 07c26e5a50a38c671ebcd80306a9a43bcf404279 | |
| parent | b965121ba864608f121690451e8ce380afd12f7e (diff) | |
| download | bcm5719-llvm-962c5a3aec056a74facf2a4fb8766d071e33aaf3.tar.gz bcm5719-llvm-962c5a3aec056a74facf2a4fb8766d071e33aaf3.zip | |
[Thumb-1] Fix corner cases for compressed jump tables
Summary:
When synthesized TBB/TBH is expanded, we need to avoid the case of:
BaseReg is redefined after the load of branching target. E.g.:
%R2 = tLEApcrelJT <jt#1>
%R1 = tLDRr %R1, %R2 ==> %R2 = tLEApcrelJT <jt#1>
%R2 = tLDRspi %SP, 12 %R2 = tLDRspi %SP, 12
tBR_JTr %R1 tTBB_JT %R2, %R1
`
Reviewers: jmolloy
Reviewed By: jmolloy
Subscribers: llvm-commits, rengolin
Differential Revision: https://reviews.llvm.org/D32250
llvm-svn: 300870
| -rw-r--r-- | llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp index 280ffd88cbe..6434df317aa 100644 --- a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -2157,6 +2157,15 @@ bool ARMConstantIslands::optimizeThumb2JumpTables() { // If we're in PIC mode, there should be another ADD following. auto *TRI = STI->getRegisterInfo(); + + // %base cannot be redefined after the load as it will appear before + // TBB/TBH like: + // %base = + // %base = + // tBB %base, %idx + if (registerDefinedBetween(BaseReg, Load->getNextNode(), MBB->end(), TRI)) + continue; + if (isPositionIndependentOrROPI) { MachineInstr *Add = Load->getNextNode(); if (Add->getOpcode() != ARM::tADDrr || |
