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| author | Amara Emerson <aemerson@apple.com> | 2019-09-21 09:21:16 +0000 |
|---|---|---|
| committer | Amara Emerson <aemerson@apple.com> | 2019-09-21 09:21:16 +0000 |
| commit | 9c7d599dec9c9b028dc56ac65e8154452fc2c77a (patch) | |
| tree | d258f8c07f9bfadf6b8c984e9b3422825851d062 | |
| parent | a59a886832bd223127f5c7edf2cf729ba6857fe7 (diff) | |
| download | bcm5719-llvm-9c7d599dec9c9b028dc56ac65e8154452fc2c77a.tar.gz bcm5719-llvm-9c7d599dec9c9b028dc56ac65e8154452fc2c77a.zip | |
[AArch64][GlobalISel] Implement selection for G_SHL of <2 x i64>
Simple continuation of existing selection support.
llvm-svn: 372467
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir | 29 |
2 files changed, 32 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp index 223aa370e97..961f38cad1e 100644 --- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp @@ -1018,7 +1018,9 @@ bool AArch64InstructionSelector::selectVectorSHL( return false; unsigned Opc = 0; - if (Ty == LLT::vector(4, 32)) { + if (Ty == LLT::vector(2, 64)) { + Opc = AArch64::USHLv2i64; + } else if (Ty == LLT::vector(4, 32)) { Opc = AArch64::USHLv4i32; } else if (Ty == LLT::vector(2, 32)) { Opc = AArch64::USHLv2i32; diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir index b13c4b5ec0d..cf9925a9a8a 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir @@ -59,6 +59,35 @@ body: | ... --- +name: shl_v2i64 +alignment: 4 +legalized: true +regBankSelected: true +tracksRegLiveness: true +registers: + - { id: 0, class: fpr } + - { id: 1, class: fpr } + - { id: 2, class: fpr } +machineFunctionInfo: {} +body: | + bb.1: + liveins: $q0, $q1 + + ; CHECK-LABEL: name: shl_v2i64 + ; CHECK: liveins: $q0, $q1 + ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 + ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 + ; CHECK: [[USHLv2i64_:%[0-9]+]]:fpr128 = USHLv2i64 [[COPY]], [[COPY1]] + ; CHECK: $q0 = COPY [[USHLv2i64_]] + ; CHECK: RET_ReallyLR implicit $q0 + %0:fpr(<2 x s64>) = COPY $q0 + %1:fpr(<2 x s64>) = COPY $q1 + %2:fpr(<2 x s64>) = G_SHL %0, %1(<2 x s64>) + $q0 = COPY %2(<2 x s64>) + RET_ReallyLR implicit $q0 + +... +--- name: ashr_v2i32 alignment: 4 legalized: true |
