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authorBill Wendling <isanbard@gmail.com>2010-08-11 01:05:02 +0000
committerBill Wendling <isanbard@gmail.com>2010-08-11 01:05:02 +0000
commit79937dfc5b79f1337c36a178bdb38f7d06311983 (patch)
treea6e85a0548b53ae7a3603b005f1754718d5907c6
parent46667afccd9404d01b776076c2f63dece045bf55 (diff)
downloadbcm5719-llvm-79937dfc5b79f1337c36a178bdb38f7d06311983.tar.gz
bcm5719-llvm-79937dfc5b79f1337c36a178bdb38f7d06311983.zip
Update test to match output of optimize compares for ARM.
llvm-svn: 110765
-rw-r--r--llvm/test/CodeGen/ARM/long_shift.ll6
1 files changed, 2 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/ARM/long_shift.ll b/llvm/test/CodeGen/ARM/long_shift.ll
index 688b7bc312c..1ec4d15f667 100644
--- a/llvm/test/CodeGen/ARM/long_shift.ll
+++ b/llvm/test/CodeGen/ARM/long_shift.ll
@@ -24,8 +24,7 @@ define i32 @f2(i64 %x, i64 %y) {
; CHECK: f2
; CHECK: mov r0, r0, lsr r2
; CHECK-NEXT: rsb r3, r2, #32
-; CHECK-NEXT: sub r2, r2, #32
-; CHECK-NEXT: cmp r2, #0
+; CHECK-NEXT: subs r2, r2, #32
; CHECK-NEXT: orr r0, r0, r1, lsl r3
; CHECK-NEXT: movge r0, r1, asr r2
%a = ashr i64 %x, %y
@@ -37,8 +36,7 @@ define i32 @f3(i64 %x, i64 %y) {
; CHECK: f3
; CHECK: mov r0, r0, lsr r2
; CHECK-NEXT: rsb r3, r2, #32
-; CHECK-NEXT: sub r2, r2, #32
-; CHECK-NEXT: cmp r2, #0
+; CHECK-NEXT: subs r2, r2, #32
; CHECK-NEXT: orr r0, r0, r1, lsl r3
; CHECK-NEXT: movge r0, r1, lsr r2
%a = lshr i64 %x, %y
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