Fix for pr7869, inline asm mult-alt constraints.

llvm-svn: 110764

2 files changed, 48 insertions, 5 deletions

diff --git a/clang/lib/Basic/TargetInfo.cpp b/clang/lib/Basic/TargetInfo.cpp
index 05db02a9fee..e46992a3657 100644
--- a/clang/lib/Basic/TargetInfo.cpp
+++ b/clang/lib/Basic/TargetInfo.cpp
@@ -289,11 +289,9 @@ bool TargetInfo::validateOutputConstraint(ConstraintInfo &Info) const {
       break;
     case ',': // multiple alternative constraint.  Pass it.
       Name++;
-      // An output constraint must start with '=' or '+'
-      if (*Name != '=' && *Name != '+')
-        return false;
-      if (*Name == '+')
-        Info.setIsReadWrite();
+      // Handle additional optional '=' or '+' modifiers.
+      if (*Name == '=' || *Name == '+')
+        Name++;
       break;
     case '?': // Disparage slightly code.
     case '!': // Disparage severly.
diff --git a/clang/test/Parser/asm-constraints-pr7869.c b/clang/test/Parser/asm-constraints-pr7869.c
new file mode 100644
index 00000000000..d6f1725f1a8
--- /dev/null
+++ b/clang/test/Parser/asm-constraints-pr7869.c
@@ -0,0 +1,45 @@
+// RUN: %clang_cc1 -fsyntax-only -verify %s
+
+int a, b, c, d, e, f, g, h, i, j, k, l;
+
+void
+f1 (void)
+{
+  __asm__ volatile (""
+            : [a] "+r" (a), [b] "+r" (b), [c] "+r" (c), [d] "+r" (d),
+              [e] "+r" (e), [f] "+r" (f), [g] "+r" (g), [h] "+r" (h),
+              [i] "+r" (i), [j] "+r" (j), [k] "+r" (k), [l] "+r" (l));
+}
+
+void
+f2 (void)
+{
+  __asm__ volatile (""
+            : [a] "+r,m" (a), [b] "+r,m" (b), [c] "+r,m" (c), [d] "+r,m" (d),
+              [e] "+r,m" (e), [f] "+r,m" (f), [g] "+r,m" (g), [h] "+r,m" (h),
+              [i] "+r,m" (i), [j] "+r,m" (j), [k] "+r,m" (k), [l] "+r,m" (l));
+}
+
+void
+f3 (void)
+{
+  __asm__ volatile (""
+            : [a] "=r" (a), [b] "=r" (b), [c] "=r" (c), [d] "=r" (d),
+              [e] "=r" (e), [f] "=r" (f), [g] "=r" (g), [h] "=r" (h),
+              [i] "=r" (i), [j] "=r" (j), [k] "=r" (k), [l] "=r" (l)
+            : "[a]" (a), "[b]" (b), "[c]" (c), "[d]" (d),
+              "[e]" (e), "[f]" (f), "[g]" (g), "[h]" (h),
+              "[i]" (i), "[j]" (j), "[k]" (k), "[l]" (l));
+}
+
+void
+f4 (void)
+{
+  __asm__ volatile (""
+            : [a] "=r,m" (a), [b] "=r,m" (b), [c] "=r,m" (c), [d] "=r,m" (d),
+              [e] "=r,m" (e), [f] "=r,m" (f), [g] "=r,m" (g), [h] "=r,m" (h),
+              [i] "=r,m" (i), [j] "=r,m" (j), [k] "=r,m" (k), [l] "=r,m" (l)
+            : "[a],m" (a), "[b],m" (b), "[c],m" (c), "[d],m" (d),
+              "[e],m" (e), "[f],m" (f), "[g],m" (g), "[h],m" (h),
+              "[i],m" (i), "[j],m" (j), "[k],m" (k), "[l],m" (l));
+}