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authorDaniel Dunbar <daniel@zuster.org>2010-08-11 05:09:20 +0000
committerDaniel Dunbar <daniel@zuster.org>2010-08-11 05:09:20 +0000
commit56e77c409b3554c8d8813444ba34c7fb80b9dbf9 (patch)
treeb2cc09e50366491343b0e2331961228aa801dc93
parent07cc87438f02488036c4e62ba9e9e8ec0f5e8a41 (diff)
downloadbcm5719-llvm-56e77c409b3554c8d8813444ba34c7fb80b9dbf9.tar.gz
bcm5719-llvm-56e77c409b3554c8d8813444ba34c7fb80b9dbf9.zip
MC/ARM: Enable generation of the ARM asm matcher, not that it can do much.
llvm-svn: 110782
-rw-r--r--llvm/lib/Target/ARM/CMakeLists.txt3
-rw-r--r--llvm/lib/Target/ARM/Makefile2
2 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/CMakeLists.txt b/llvm/lib/Target/ARM/CMakeLists.txt
index f865573044b..6b4dee5965d 100644
--- a/llvm/lib/Target/ARM/CMakeLists.txt
+++ b/llvm/lib/Target/ARM/CMakeLists.txt
@@ -7,11 +7,12 @@ tablegen(ARMGenInstrNames.inc -gen-instr-enums)
tablegen(ARMGenInstrInfo.inc -gen-instr-desc)
tablegen(ARMGenCodeEmitter.inc -gen-emitter)
tablegen(ARMGenAsmWriter.inc -gen-asm-writer)
+tablegen(ARMGenAsmMatcher.inc -gen-asm-matcher)
tablegen(ARMGenDAGISel.inc -gen-dag-isel)
+tablegen(ARMGenFastISel.inc -gen-fast-isel)
tablegen(ARMGenCallingConv.inc -gen-callingconv)
tablegen(ARMGenSubtarget.inc -gen-subtarget)
tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info)
-tablegen(ARMGenFastISel.inc -gen-fast-isel)
add_llvm_target(ARMCodeGen
ARMAsmPrinter.cpp
diff --git a/llvm/lib/Target/ARM/Makefile b/llvm/lib/Target/ARM/Makefile
index 027618707d3..b3fcfaf6bda 100644
--- a/llvm/lib/Target/ARM/Makefile
+++ b/llvm/lib/Target/ARM/Makefile
@@ -14,7 +14,7 @@ TARGET = ARM
# Make sure that tblgen is run, first thing.
BUILT_SOURCES = ARMGenRegisterInfo.h.inc ARMGenRegisterNames.inc \
ARMGenRegisterInfo.inc ARMGenInstrNames.inc \
- ARMGenInstrInfo.inc ARMGenAsmWriter.inc \
+ ARMGenInstrInfo.inc ARMGenAsmWriter.inc ARMGenAsmMatcher.inc \
ARMGenDAGISel.inc ARMGenSubtarget.inc \
ARMGenCodeEmitter.inc ARMGenCallingConv.inc \
ARMGenDecoderTables.inc ARMGenEDInfo.inc \
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