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| author | Joe Abbey <jabbey@arxan.com> | 2012-01-16 13:16:05 +0000 |
|---|---|---|
| committer | Joe Abbey <jabbey@arxan.com> | 2012-01-16 13:16:05 +0000 |
| commit | 36cd89e7bd5363211dd1270e4984ee74440128d0 (patch) | |
| tree | 48149959b1f1031c7beb444f21d244914f474c98 | |
| parent | 1b65b17bf51c13e2ee0c461327a94f04390947eb (diff) | |
| download | bcm5719-llvm-36cd89e7bd5363211dd1270e4984ee74440128d0.tar.gz bcm5719-llvm-36cd89e7bd5363211dd1270e4984ee74440128d0.zip | |
Adding a Hexagon cell for segmented stacks, as they have been implemented for X86 and not Sparc...
Committed as obvious
llvm-svn: 148237
| -rw-r--r-- | llvm/docs/CodeGenerator.html | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/docs/CodeGenerator.html b/llvm/docs/CodeGenerator.html index 345eb7ced58..6b5b204dc58 100644 --- a/llvm/docs/CodeGenerator.html +++ b/llvm/docs/CodeGenerator.html @@ -2491,6 +2491,7 @@ is the key:</p> <td><a href="#feat_segstacks">segmented stacks</a></td> <td class="no"></td> <!-- ARM --> <td class="no"></td> <!-- CellSPU --> + <td class="no"></td> <!-- Hexagon --> <td class="no"></td> <!-- MBlaze --> <td class="no"></td> <!-- MSP430 --> <td class="no"></td> <!-- Mips --> |
