From 36cd89e7bd5363211dd1270e4984ee74440128d0 Mon Sep 17 00:00:00 2001
From: Joe Abbey <jabbey@arxan.com>
Date: Mon, 16 Jan 2012 13:16:05 +0000
Subject: Adding a Hexagon cell for segmented stacks, as they have been
 implemented for X86 and not Sparc...

Committed as obvious

llvm-svn: 148237
---
 llvm/docs/CodeGenerator.html | 1 +
 1 file changed, 1 insertion(+)

diff --git a/llvm/docs/CodeGenerator.html b/llvm/docs/CodeGenerator.html
index 345eb7ced58..6b5b204dc58 100644
--- a/llvm/docs/CodeGenerator.html
+++ b/llvm/docs/CodeGenerator.html
@@ -2491,6 +2491,7 @@ is the key:</p>
   <td><a href="#feat_segstacks">segmented stacks</a></td>
   <td class="no"></td> <!-- ARM -->
   <td class="no"></td> <!-- CellSPU -->
+  <td class="no"></td> <!-- Hexagon -->
   <td class="no"></td> <!-- MBlaze -->
   <td class="no"></td> <!-- MSP430 -->
   <td class="no"></td> <!-- Mips -->
-- 
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