diff options
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-04-06 17:15:56 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-04-06 17:15:56 +0000 |
| commit | 1e6659c1f0e433266f5ae08ee69d2382d640bd2a (patch) | |
| tree | 9b44218ab6c9873b2b84554cb73b7af4aa75f269 | |
| parent | c50570fb4f12bc07fd18930001cf0a6738aae35b (diff) | |
| download | bcm5719-llvm-1e6659c1f0e433266f5ae08ee69d2382d640bd2a.tar.gz bcm5719-llvm-1e6659c1f0e433266f5ae08ee69d2382d640bd2a.zip | |
Add additional tests from D45366
llvm-svn: 329425
| -rw-r--r-- | llvm/test/CodeGen/Generic/expand-experimental-reductions.ll | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Generic/expand-experimental-reductions.ll b/llvm/test/CodeGen/Generic/expand-experimental-reductions.ll index ef813fa7205..d38e9504705 100644 --- a/llvm/test/CodeGen/Generic/expand-experimental-reductions.ll +++ b/llvm/test/CodeGen/Generic/expand-experimental-reductions.ll @@ -110,6 +110,17 @@ entry: ret float %r } +define float @fadd_f32_strict_accum(float %accum, <4 x float> %vec) { +; CHECK-LABEL: @fadd_f32_strict_accum( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[R:%.*]] = call float @llvm.experimental.vector.reduce.fadd.f32.f32.v4f32(float [[ACCUM:%.*]], <4 x float> [[VEC:%.*]]) +; CHECK-NEXT: ret float [[R]] +; +entry: + %r = call float @llvm.experimental.vector.reduce.fadd.f32.v4f32(float %accum, <4 x float> %vec) + ret float %r +} + define float @fmul_f32(<4 x float> %vec) { ; CHECK-LABEL: @fmul_f32( ; CHECK-NEXT: entry: @@ -125,6 +136,28 @@ entry: ret float %r } +define float @fmul_f32_strict(<4 x float> %vec) { +; CHECK-LABEL: @fmul_f32_strict( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[R:%.*]] = call float @llvm.experimental.vector.reduce.fmul.f32.f32.v4f32(float undef, <4 x float> [[VEC:%.*]]) +; CHECK-NEXT: ret float [[R]] +; +entry: + %r = call float @llvm.experimental.vector.reduce.fmul.f32.v4f32(float undef, <4 x float> %vec) + ret float %r +} + +define float @fmul_f32_strict_accum(float %accum, <4 x float> %vec) { +; CHECK-LABEL: @fmul_f32_strict_accum( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[R:%.*]] = call float @llvm.experimental.vector.reduce.fmul.f32.f32.v4f32(float [[ACCUM:%.*]], <4 x float> [[VEC:%.*]]) +; CHECK-NEXT: ret float [[R]] +; +entry: + %r = call float @llvm.experimental.vector.reduce.fmul.f32.v4f32(float %accum, <4 x float> %vec) + ret float %r +} + define i64 @smax_i64(<2 x i64> %vec) { ; CHECK-LABEL: @smax_i64( ; CHECK-NEXT: entry: |
