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| author | Hal Finkel <hfinkel@anl.gov> | 2014-12-04 00:46:20 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2014-12-04 00:46:20 +0000 |
| commit | 029042b278c2349b2c35d7b8e53dabfda57a2d3c (patch) | |
| tree | 01659a309cec57e1a0de5c62e9da0194be65a52c | |
| parent | ce5ff371b383f3a5d1384e825c10b71c33a6a02a (diff) | |
| download | bcm5719-llvm-029042b278c2349b2c35d7b8e53dabfda57a2d3c.tar.gz bcm5719-llvm-029042b278c2349b2c35d7b8e53dabfda57a2d3c.zip | |
[PowerPC] 'cc' should be an alias only to 'cr0'
We had mistakenly believed that GCC's 'cc' referred to the entire
condition-code register (cr0 through cr7) -- and implemented this in r205630 to
fix PR19326, but 'cc' is actually an alias only to 'cr0'. This is causing LLVM
to clobber too much with legacy code with inline asm using the 'cc' clobber.
Fixes PR21451.
llvm-svn: 223328
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCRegisterInfo.td | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/cc.ll | 2 |
2 files changed, 3 insertions, 5 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td index b3d145b2cc4..e9288583884 100644 --- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.td +++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.td @@ -188,11 +188,9 @@ def CR6 : CR<6, "cr6", [CR6LT, CR6GT, CR6EQ, CR6UN]>, DwarfRegNum<[74, 74]>; def CR7 : CR<7, "cr7", [CR7LT, CR7GT, CR7EQ, CR7UN]>, DwarfRegNum<[75, 75]>; } -// The full condition-code register. This is not modeled fully, but defined -// here primarily, for compatibility with gcc, to allow the inline asm "cc" -// clobber specification to work. +// An alias for "cr0" used by GCC. def CC : PPCReg<"cc">, DwarfRegAlias<CR0> { - let Aliases = [CR0, CR1, CR2, CR3, CR4, CR5, CR6, CR7]; + let Aliases = [CR0]; } // Link register diff --git a/llvm/test/CodeGen/PowerPC/cc.ll b/llvm/test/CodeGen/PowerPC/cc.ll index f92121bd720..c23ee7c9f5c 100644 --- a/llvm/test/CodeGen/PowerPC/cc.ll +++ b/llvm/test/CodeGen/PowerPC/cc.ll @@ -41,7 +41,7 @@ entry: br label %foo foo: - call { i64, i64 } asm sideeffect "sc", "={r0},={r3},{r0},~{cc}" (i64 %a) + call { i64, i64 } asm sideeffect "sc", "={r0},={r3},{r0},~{cc},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{cr7}" (i64 %a) br i1 %c, label %bar, label %end bar: |
