translated_examples/Makefile


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#!/usr/bin/make

all:
ifneq ($(shell which iverilog),)
	@echo "##### Checking resulting Verilog files with iverilog ###########"
	@$(foreach VERILOG,$(wildcard *.v), echo "Checking: $(VERILOG)";\
	iverilog -Wall -y . -t null $(VERILOG);)
endif