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#!/usr/bin/make
# by RAM 2017
EXAMPLES = $(wildcard examples/*.vhd)
VHDLS = $(notdir $(EXAMPLES))
all: diff
src/vhd2vl:
make -C src
translate: src/vhd2vl
@mkdir -p temp/verilog
@make -C examples
@cd examples; $(foreach VHDL,$(VHDLS), echo "Translating: $(VHDL)";../src/vhd2vl --quiet $(VHDL) ../temp/verilog/$(basename $(VHDL)).v;)
diff: translate
@diff -u translated_examples temp/verilog
clean:
make -C src clean
@make -C examples clean
rm -fr temp
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