| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Added analysis of examples with GHDL | Rodrigo Alejandro Melo | 2017-02-14 | 1 | -0/+3 |
| | | | | | | | | | Some examples were corrected according GHDL complains. Corresponding traslated_examples were modified. Use of synopsys libraries was removed. Translation of gh_fifo_async16_sr.vhd fails (complains about 'unsigned'). The problem was comented. | ||||
| * | Space deleted in the <size>'<radix><number> notation | Rodrigo Alejandro Melo | 2017-02-09 | 1 | -0/+1 |
| | | | | | | | | It seems to be the more common approach and the VHDL notation BASE#NUMBER# is translated without spaces. On the other hand, the space gives an error with Yosys synthesizer. Files on translated_examples were modified. | ||||
| * | Added a Makefile for regression testing | Rodrigo Alejandro Melo | 2017-02-09 | 1 | -0/+6 |
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| vhdl2vl | Raptor Computing Systems |
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