diff options
Diffstat (limited to 'translated_examples')
| -rw-r--r-- | translated_examples/Makefile | 4 | ||||
| -rw-r--r-- | translated_examples/ifchain2.v | 2 |
2 files changed, 2 insertions, 4 deletions
diff --git a/translated_examples/Makefile b/translated_examples/Makefile index 6ab476d..b4bfad1 100644 --- a/translated_examples/Makefile +++ b/translated_examples/Makefile @@ -4,10 +4,8 @@ TEMP = ../temp/verilog all: ifneq ($(shell which iverilog),) - @mkdir -p $(TEMP) @echo "##### Checking resulting Verilog files with iverilog ###########" - @-cd $(TEMP); $(foreach VERILOG,$(wildcard *.v), echo "Checking: $(VERILOG)";\ - iverilog -Wall -y . -t null $(VERILOG);) + -cd $(TEMP); iverilog -Wall -y . -t null *.v endif clean: diff --git a/translated_examples/ifchain2.v b/translated_examples/ifchain2.v index 53e223d..3208dcf 100644 --- a/translated_examples/ifchain2.v +++ b/translated_examples/ifchain2.v @@ -1,6 +1,6 @@ // no timescale needed -module ifchain( +module ifchain2( input wire clk, input wire rstn, input wire enable, |
