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| author | Rodrigo Alejandro Melo <rodrigomelo9@gmail.com> | 2017-02-19 12:18:05 -0300 |
|---|---|---|
| committer | Rodrigo Alejandro Melo <rodrigomelo9@gmail.com> | 2017-02-19 12:22:29 -0300 |
| commit | 4e42da408f9ddbd518601fcc6d1a0f50c941ec5e (patch) | |
| tree | c1578ea9d936124b456651c23d2d82d0f88eae64 /translated_examples | |
| parent | 3c72037ab47fb87c525b2c7f741b8d5d1614a30b (diff) | |
| download | vhdl2vl-4e42da408f9ddbd518601fcc6d1a0f50c941ec5e.tar.gz vhdl2vl-4e42da408f9ddbd518601fcc6d1a0f50c941ec5e.zip | |
Promoted unsupported BASED NUMBER from warning to error
Because the resulting verilog had the unsupported notation BASE#NUMBER#.
Moreover, the 'ERROR:' string was added when an error is informed.
Diffstat (limited to 'translated_examples')
| -rw-r--r-- | translated_examples/based.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/translated_examples/based.v b/translated_examples/based.v index 1dfa643..e1386c8 100644 --- a/translated_examples/based.v +++ b/translated_examples/based.v @@ -13,7 +13,7 @@ wire [31:0] foo; wire [31:0] foo2; wire [31:0] foo8; wire [31:0] foo10; wire [31 assign foo2 = 'B00101101110111; assign foo8 = 'O0177362; assign foo10 = 'D01234; - assign foo11 = 11#01234#; + //foo11<= 11#01234#; assign foo16 = 'H12af; endmodule |
