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authorLarry Doolittle <ldoolitt@recycle.lbl.gov>2015-09-20 09:47:30 -0700
committerLarry Doolittle <ldoolitt@recycle.lbl.gov>2015-09-20 13:11:14 -0700
commit08d29b6a642956a36930e7272f07ccd1c33bb0e5 (patch)
tree31fd1c24dcdbba83582d1b06d6c773bb9d972344 /translated_examples
parent6508df262b4f5ba28695a12c456c383c73d01127 (diff)
downloadvhdl2vl-08d29b6a642956a36930e7272f07ccd1c33bb0e5.tar.gz
vhdl2vl-08d29b6a642956a36930e7272f07ccd1c33bb0e5.zip
vhd2vl-2.5
Diffstat (limited to 'translated_examples')
-rw-r--r--translated_examples/based.v4
-rw-r--r--translated_examples/bigfile.v4
-rw-r--r--translated_examples/clk.v4
-rw-r--r--translated_examples/counters.v4
-rw-r--r--translated_examples/expr.v4
-rw-r--r--translated_examples/for.v4
-rw-r--r--translated_examples/generate.v4
-rw-r--r--translated_examples/generic.v4
-rw-r--r--translated_examples/genericmap.v4
-rw-r--r--translated_examples/gh_fifo_async16_sr.v4
-rw-r--r--translated_examples/ifchain.v4
-rw-r--r--translated_examples/test.v4
12 files changed, 24 insertions, 24 deletions
diff --git a/translated_examples/based.v b/translated_examples/based.v
index 1589453..9e28f9b 100644
--- a/translated_examples/based.v
+++ b/translated_examples/based.v
@@ -1,4 +1,4 @@
-// File based.vhd translated with vhd2vl v2.4 VHDL to Verilog RTL translator
+// File based.vhd translated with vhd2vl v2.5 VHDL to Verilog RTL translator
// vhd2vl settings:
// * Verilog Module Declaration Style: 1995
@@ -7,7 +7,7 @@
// http://www.ocean-logic.com
// Modifications Copyright (C) 2006 Mark Gonzales - PMC Sierra Inc
// Modifications (C) 2010 Shankar Giri
-// Modifications Copyright (C) 2002, 2005, 2008-2010 Larry Doolittle - LBNL
+// Modifications Copyright (C) 2002, 2005, 2008-2010, 2015 Larry Doolittle - LBNL
// http://doolittle.icarus.com/~larry/vhd2vl/
//
// vhd2vl comes with ABSOLUTELY NO WARRANTY. Always check the resulting
diff --git a/translated_examples/bigfile.v b/translated_examples/bigfile.v
index c124c42..4fee00f 100644
--- a/translated_examples/bigfile.v
+++ b/translated_examples/bigfile.v
@@ -1,4 +1,4 @@
-// File bigfile.vhd translated with vhd2vl v2.4 VHDL to Verilog RTL translator
+// File bigfile.vhd translated with vhd2vl v2.5 VHDL to Verilog RTL translator
// vhd2vl settings:
// * Verilog Module Declaration Style: 1995
@@ -7,7 +7,7 @@
// http://www.ocean-logic.com
// Modifications Copyright (C) 2006 Mark Gonzales - PMC Sierra Inc
// Modifications (C) 2010 Shankar Giri
-// Modifications Copyright (C) 2002, 2005, 2008-2010 Larry Doolittle - LBNL
+// Modifications Copyright (C) 2002, 2005, 2008-2010, 2015 Larry Doolittle - LBNL
// http://doolittle.icarus.com/~larry/vhd2vl/
//
// vhd2vl comes with ABSOLUTELY NO WARRANTY. Always check the resulting
diff --git a/translated_examples/clk.v b/translated_examples/clk.v
index b7e1571..41797b7 100644
--- a/translated_examples/clk.v
+++ b/translated_examples/clk.v
@@ -1,4 +1,4 @@
-// File clk.vhd translated with vhd2vl v2.4 VHDL to Verilog RTL translator
+// File clk.vhd translated with vhd2vl v2.5 VHDL to Verilog RTL translator
// vhd2vl settings:
// * Verilog Module Declaration Style: 1995
@@ -7,7 +7,7 @@
// http://www.ocean-logic.com
// Modifications Copyright (C) 2006 Mark Gonzales - PMC Sierra Inc
// Modifications (C) 2010 Shankar Giri
-// Modifications Copyright (C) 2002, 2005, 2008-2010 Larry Doolittle - LBNL
+// Modifications Copyright (C) 2002, 2005, 2008-2010, 2015 Larry Doolittle - LBNL
// http://doolittle.icarus.com/~larry/vhd2vl/
//
// vhd2vl comes with ABSOLUTELY NO WARRANTY. Always check the resulting
diff --git a/translated_examples/counters.v b/translated_examples/counters.v
index 277e707..23fc54a 100644
--- a/translated_examples/counters.v
+++ b/translated_examples/counters.v
@@ -1,4 +1,4 @@
-// File counters.vhd translated with vhd2vl v2.4 VHDL to Verilog RTL translator
+// File counters.vhd translated with vhd2vl v2.5 VHDL to Verilog RTL translator
// vhd2vl settings:
// * Verilog Module Declaration Style: 1995
@@ -7,7 +7,7 @@
// http://www.ocean-logic.com
// Modifications Copyright (C) 2006 Mark Gonzales - PMC Sierra Inc
// Modifications (C) 2010 Shankar Giri
-// Modifications Copyright (C) 2002, 2005, 2008-2010 Larry Doolittle - LBNL
+// Modifications Copyright (C) 2002, 2005, 2008-2010, 2015 Larry Doolittle - LBNL
// http://doolittle.icarus.com/~larry/vhd2vl/
//
// vhd2vl comes with ABSOLUTELY NO WARRANTY. Always check the resulting
diff --git a/translated_examples/expr.v b/translated_examples/expr.v
index 4d66026..43f6221 100644
--- a/translated_examples/expr.v
+++ b/translated_examples/expr.v
@@ -1,4 +1,4 @@
-// File expr.vhd translated with vhd2vl v2.4 VHDL to Verilog RTL translator
+// File expr.vhd translated with vhd2vl v2.5 VHDL to Verilog RTL translator
// vhd2vl settings:
// * Verilog Module Declaration Style: 1995
@@ -7,7 +7,7 @@
// http://www.ocean-logic.com
// Modifications Copyright (C) 2006 Mark Gonzales - PMC Sierra Inc
// Modifications (C) 2010 Shankar Giri
-// Modifications Copyright (C) 2002, 2005, 2008-2010 Larry Doolittle - LBNL
+// Modifications Copyright (C) 2002, 2005, 2008-2010, 2015 Larry Doolittle - LBNL
// http://doolittle.icarus.com/~larry/vhd2vl/
//
// vhd2vl comes with ABSOLUTELY NO WARRANTY. Always check the resulting
diff --git a/translated_examples/for.v b/translated_examples/for.v
index 1c47083..a79e5e1 100644
--- a/translated_examples/for.v
+++ b/translated_examples/for.v
@@ -1,4 +1,4 @@
-// File for.vhd translated with vhd2vl v2.4 VHDL to Verilog RTL translator
+// File for.vhd translated with vhd2vl v2.5 VHDL to Verilog RTL translator
// vhd2vl settings:
// * Verilog Module Declaration Style: 1995
@@ -7,7 +7,7 @@
// http://www.ocean-logic.com
// Modifications Copyright (C) 2006 Mark Gonzales - PMC Sierra Inc
// Modifications (C) 2010 Shankar Giri
-// Modifications Copyright (C) 2002, 2005, 2008-2010 Larry Doolittle - LBNL
+// Modifications Copyright (C) 2002, 2005, 2008-2010, 2015 Larry Doolittle - LBNL
// http://doolittle.icarus.com/~larry/vhd2vl/
//
// vhd2vl comes with ABSOLUTELY NO WARRANTY. Always check the resulting
diff --git a/translated_examples/generate.v b/translated_examples/generate.v
index 9dcdf2b..29fbe5d 100644
--- a/translated_examples/generate.v
+++ b/translated_examples/generate.v
@@ -1,4 +1,4 @@
-// File generate.vhd translated with vhd2vl v2.4 VHDL to Verilog RTL translator
+// File generate.vhd translated with vhd2vl v2.5 VHDL to Verilog RTL translator
// vhd2vl settings:
// * Verilog Module Declaration Style: 1995
@@ -7,7 +7,7 @@
// http://www.ocean-logic.com
// Modifications Copyright (C) 2006 Mark Gonzales - PMC Sierra Inc
// Modifications (C) 2010 Shankar Giri
-// Modifications Copyright (C) 2002, 2005, 2008-2010 Larry Doolittle - LBNL
+// Modifications Copyright (C) 2002, 2005, 2008-2010, 2015 Larry Doolittle - LBNL
// http://doolittle.icarus.com/~larry/vhd2vl/
//
// vhd2vl comes with ABSOLUTELY NO WARRANTY. Always check the resulting
diff --git a/translated_examples/generic.v b/translated_examples/generic.v
index c5cf39f..ca6e298 100644
--- a/translated_examples/generic.v
+++ b/translated_examples/generic.v
@@ -1,4 +1,4 @@
-// File generic.vhd translated with vhd2vl v2.4 VHDL to Verilog RTL translator
+// File generic.vhd translated with vhd2vl v2.5 VHDL to Verilog RTL translator
// vhd2vl settings:
// * Verilog Module Declaration Style: 1995
@@ -7,7 +7,7 @@
// http://www.ocean-logic.com
// Modifications Copyright (C) 2006 Mark Gonzales - PMC Sierra Inc
// Modifications (C) 2010 Shankar Giri
-// Modifications Copyright (C) 2002, 2005, 2008-2010 Larry Doolittle - LBNL
+// Modifications Copyright (C) 2002, 2005, 2008-2010, 2015 Larry Doolittle - LBNL
// http://doolittle.icarus.com/~larry/vhd2vl/
//
// vhd2vl comes with ABSOLUTELY NO WARRANTY. Always check the resulting
diff --git a/translated_examples/genericmap.v b/translated_examples/genericmap.v
index f66d2f8..26573b9 100644
--- a/translated_examples/genericmap.v
+++ b/translated_examples/genericmap.v
@@ -1,4 +1,4 @@
-// File genericmap.vhd translated with vhd2vl v2.4 VHDL to Verilog RTL translator
+// File genericmap.vhd translated with vhd2vl v2.5 VHDL to Verilog RTL translator
// vhd2vl settings:
// * Verilog Module Declaration Style: 1995
@@ -7,7 +7,7 @@
// http://www.ocean-logic.com
// Modifications Copyright (C) 2006 Mark Gonzales - PMC Sierra Inc
// Modifications (C) 2010 Shankar Giri
-// Modifications Copyright (C) 2002, 2005, 2008-2010 Larry Doolittle - LBNL
+// Modifications Copyright (C) 2002, 2005, 2008-2010, 2015 Larry Doolittle - LBNL
// http://doolittle.icarus.com/~larry/vhd2vl/
//
// vhd2vl comes with ABSOLUTELY NO WARRANTY. Always check the resulting
diff --git a/translated_examples/gh_fifo_async16_sr.v b/translated_examples/gh_fifo_async16_sr.v
index cb358a7..2f711a9 100644
--- a/translated_examples/gh_fifo_async16_sr.v
+++ b/translated_examples/gh_fifo_async16_sr.v
@@ -1,4 +1,4 @@
-// File gh_fifo_async16_sr.vhd translated with vhd2vl v2.4 VHDL to Verilog RTL translator
+// File gh_fifo_async16_sr.vhd translated with vhd2vl v2.5 VHDL to Verilog RTL translator
// vhd2vl settings:
// * Verilog Module Declaration Style: 1995
@@ -7,7 +7,7 @@
// http://www.ocean-logic.com
// Modifications Copyright (C) 2006 Mark Gonzales - PMC Sierra Inc
// Modifications (C) 2010 Shankar Giri
-// Modifications Copyright (C) 2002, 2005, 2008-2010 Larry Doolittle - LBNL
+// Modifications Copyright (C) 2002, 2005, 2008-2010, 2015 Larry Doolittle - LBNL
// http://doolittle.icarus.com/~larry/vhd2vl/
//
// vhd2vl comes with ABSOLUTELY NO WARRANTY. Always check the resulting
diff --git a/translated_examples/ifchain.v b/translated_examples/ifchain.v
index 459c0ed..abfd6bf 100644
--- a/translated_examples/ifchain.v
+++ b/translated_examples/ifchain.v
@@ -1,4 +1,4 @@
-// File ifchain.vhd translated with vhd2vl v2.4 VHDL to Verilog RTL translator
+// File ifchain.vhd translated with vhd2vl v2.5 VHDL to Verilog RTL translator
// vhd2vl settings:
// * Verilog Module Declaration Style: 1995
@@ -7,7 +7,7 @@
// http://www.ocean-logic.com
// Modifications Copyright (C) 2006 Mark Gonzales - PMC Sierra Inc
// Modifications (C) 2010 Shankar Giri
-// Modifications Copyright (C) 2002, 2005, 2008-2010 Larry Doolittle - LBNL
+// Modifications Copyright (C) 2002, 2005, 2008-2010, 2015 Larry Doolittle - LBNL
// http://doolittle.icarus.com/~larry/vhd2vl/
//
// vhd2vl comes with ABSOLUTELY NO WARRANTY. Always check the resulting
diff --git a/translated_examples/test.v b/translated_examples/test.v
index d11e643..7e51bc0 100644
--- a/translated_examples/test.v
+++ b/translated_examples/test.v
@@ -1,4 +1,4 @@
-// File test.vhd translated with vhd2vl v2.4 VHDL to Verilog RTL translator
+// File test.vhd translated with vhd2vl v2.5 VHDL to Verilog RTL translator
// vhd2vl settings:
// * Verilog Module Declaration Style: 1995
@@ -7,7 +7,7 @@
// http://www.ocean-logic.com
// Modifications Copyright (C) 2006 Mark Gonzales - PMC Sierra Inc
// Modifications (C) 2010 Shankar Giri
-// Modifications Copyright (C) 2002, 2005, 2008-2010 Larry Doolittle - LBNL
+// Modifications Copyright (C) 2002, 2005, 2008-2010, 2015 Larry Doolittle - LBNL
// http://doolittle.icarus.com/~larry/vhd2vl/
//
// vhd2vl comes with ABSOLUTELY NO WARRANTY. Always check the resulting
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