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author | Larry Doolittle <ldoolitt@recycle.lbl.gov> | 2017-11-17 21:26:10 -0800 |
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committer | Larry Doolittle <ldoolitt@recycle.lbl.gov> | 2017-11-17 21:26:10 -0800 |
commit | 7727267d7ca0cd48d26aae12da622bae4fb7c2cb (patch) | |
tree | 204030ca15c7e60abd292bcf1dc85b8bc3aeb600 | |
parent | 891255b54058e74df28d5c8630d11c86a6333899 (diff) | |
download | vhdl2vl-7727267d7ca0cd48d26aae12da622bae4fb7c2cb.tar.gz vhdl2vl-7727267d7ca0cd48d26aae12da622bae4fb7c2cb.zip |
Fix capitalization of iverilog
-rw-r--r-- | translated_examples/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/translated_examples/Makefile b/translated_examples/Makefile index 5ba8249..6ab476d 100644 --- a/translated_examples/Makefile +++ b/translated_examples/Makefile @@ -5,7 +5,7 @@ TEMP = ../temp/verilog all: ifneq ($(shell which iverilog),) @mkdir -p $(TEMP) - @echo "##### Checking resulting Verilog files with iVerilog ###########" + @echo "##### Checking resulting Verilog files with iverilog ###########" @-cd $(TEMP); $(foreach VERILOG,$(wildcard *.v), echo "Checking: $(VERILOG)";\ iverilog -Wall -y . -t null $(VERILOG);) endif |