| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Optimized memset() implementation for POWER | Stewart Smith | 2015-06-01 | 1 | -0/+22 |
| | | | | | | | | | | | | | This uses the dcbz instruction to clear cacheline at a time rather than byte at a time. This means that even without high levels of optimization, we *dramatically* improve boot performance with SKIBOOT_GCOV=1 and probably ever so slightly speed things up for normal builds. We currently just hard-code 128 as cacheline size as all CPUs that skiboot currently boots on have 128 byte cachelines. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> | ||||
| * | Initial commit of Open Source release | Benjamin Herrenschmidt | 2014-07-02 | 18 | -0/+536 |
| Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> | |||||
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index : talos-skiboot | |
| Talos™ II skiboot sources | Raptor Computing Systems |
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