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* nvram: add nvram_query_eq()Oliver O'Halloran2016-10-141-0/+1
| | | | | | | | Adds a helper that looks for the given NVRAM config string and checks that associated value is equal to the supplied value. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* nvram: force re-verification after writingOliver O'Halloran2016-10-141-0/+1
| | | | | | | | | | The running OS is free to re-write the contents of NVRAM. The skiboot NVRAM parser relies on the NVRAM contents being valid so we need to force the NVRAM contents to be revalidated after the host OS has written to it. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* include/capp.h: add #include guardClaudio Carvalho2016-10-101-1/+6
| | | | | | | This adds #include guard for include/capp.h Signed-off-by: Claudio Carvalho <cclaudio@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core: add flash_subpart_info()Claudio Carvalho2016-10-101-1/+3
| | | | | | | | | | | | | | | | | | Currently, the CAPP lid has the TOC (4K) and one supartition (36K). For secure boot we can either build one container for the TOC and another one for the subpartition, or build one container for the whole CAPP partition. We decided implement the second option. The first option would require changes to the CAPP TOC layout in order to correlate the TOC with the subpartitions. Besides that, the first option also increases the boot time since we would need to verify and measure the CAPP TOC. This patch adds the flash_subpart_info function so the correct CAPP subpartition can be selected also outside of the flash API. Signed-off-by: Claudio Carvalho <cclaudio@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/init: remove master_cpu parameterOliver O'Halloran2016-09-271-1/+1
| | | | | | | | | | | | master_cpu is used to determine the ChipTOD master if no ChipTOD information is available in the HDAT. However, it is set to zero at every skiboot entry point (fdt_entry, the 0x180 FSP entry and opal_boot_trampoline) and is otherwise unused. This patch removes this passing around and uses the boot CPU PIR to find the ChipTOD master rather than zero. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* occ/prd/opal-prd: Queue OCC_RESET event message to host in OpenPOWERShilpasri G Bhat2016-09-262-0/+2
| | | | | | | | | | | | | | | | | During an OCC reset cycle the system is forced to Psafe pstate. When OCC becomes active, the system has to be restored to its last pstate as requested by host. So host needs to be notified of OCC_RESET event or else system will continue to remian in Psafe state until host requests a new pstate after the OCC reset cycle. This patch defines 'OPAL_PRD_MSG_TYPE_OCC_RESET_NOTIFY' to notify OPAL when opal-prd issues OCC reset. OPAL will queue OCC_RESET message to host when it receives opal_prd_msg of type '*_OCC_RESET_NOTIFY'. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* include: Fix u8 type in chip.hClaudio Carvalho2016-09-141-3/+3
| | | | | | | | | | u8 is defined in ccan/short_types/short_types.h, but chip.h doesn't include it. This just replaces u8 by uint8_t in chip.h. Signed-off-by: Claudio Carvalho <cclaudio@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* centaur: Mark centaur offline after 10 consecutive access errorsBenjamin Herrenschmidt2016-09-132-0/+3
| | | | | | | | This avoids spamming the logs when the centaur is dead and PRD constantly tries to access it Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* xscom: Map all HMER status codes to OPAL errorsBenjamin Herrenschmidt2016-09-131-0/+7
| | | | | | | | | | Instead of mapping them to just 3 different codes, define an OPAL error code for all known HMER error status, as different recovery path might be needed at the call site, and it allows for more informative logging. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/cpu.c: Add OPAL call to setup Nest MMUAlistair Popple2016-09-061-1/+2
| | | | | | | | | | | | | | | POWER9 has an off core MMU called the Nest MMU which allows other units within a chip to perform address translations. The context and setup for translations is handled by the requesting agents, however the Nest MMU does need to know where in system memory the page tables are located. This patch adds a call to setup the Nest MMU page table pointer on a per-chip basis. Signed-off-by: Alistair Popple <alistair@popple.id.au> Reviewed-by: Balbir Singh <bsingharora@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/init: ensure that HRMOR is zero at bootOliver O'Halloran2016-09-061-0/+1
| | | | | | | | | | We have only ever supported running with HRMOR = 0. Having a non-zero HRMOR causes all real mode accesses to have the value of HRMOR bitwise ORed into the address that would have been accessed. This causes issues when accessing MMIO registers such as the XSCOMs. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* hw/npu: Use PCI virtual deviceGavin Shan2016-09-021-17/+5
| | | | | | | | | | | | | This rmoves the codes for emulated PCI config space as it can be supported by generic PCI virtual device: * The PCI virtual device and NPU device are created at same time. * Uses PCI virtual device and filter to access NPU (PCI) device's config space. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/pci: Support virtual deviceGavin Shan2016-09-022-0/+86
| | | | | | | | | | | | | | | | | | | | | | The NVLinks (v1 and v2 to be supported in future) are exposed to Linux kernel by emulated PCI devices (aka PCI virtual devices). Currently, the implementation is covered by NVLink driver (npu.c), meaning npu2.c will have similar implementation though it will be totally duplicated with that in npu.c. This supports PCI virtual device in the generic layer so that it can be shared by all NVLink drivers. The design is highlighted as: * There are 3 config spaces for every PCI virtual device, corresponds to the cached config space, readonly space, write-1-clear space. * Reuse PCI config register filter mechanism to allow NVLink driver to emulate the access to the designated config registers. The config values are fetched from or written to the cached config space when the config registers aren't covered by filter. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/pci: Improve PCI config register filterGavin Shan2016-09-021-4/+4
| | | | | | | | | | | | | | | | This improves PCI config register filter so that it can be reused by PCI virtual device in subsequent patch: * First argument to pci_cfg_reg_func() is changed to "void *". It allows to accept variable data types including PCI virtual device in future. * Return value from pci_cfg_reg_func() to be used by PCI virtual device in future. * Shortened name of function phb3_pcicfg_filter_rc_pref_window(). Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* hw/npu: program NPU BUID reg properlyMilton Miller2016-09-021-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | The NPU BUID register was incorrectly programmed resulting in npu interrupt level 0 causing a PB_CENT_CRESP_ADDR_ERROR checkstop, and irqs from npus in odd chips being aliased to and processed as the interrupts from the corresponding npu on the even chips. The documentation for the BUID register is confusing, describing required values of some bits and bits of differing meaning within contained within one field. This patch seperates the per-irq-level irq enable mask from the documented buid base field, leaving the buid base as the part that is directly compared. It documents the buid as the boundary of a block of 16 sources (in the form of a 4 bit shift), and documents that some bits are sourced from another register and are always compared to that register, so they are not required to be set in the base and mask fields. Fixes: cc61799 Nvlink: Add NPU PHB functions Signed-off-by: Milton Miller <miltonm@us.ibm.com> Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* pci: Standardise on uint64_t pe_numberRussell Currey2016-08-302-12/+14
| | | | | | | | | | | | | | | Throughout skiboot (and the kernel) PE numbers are named "pe_no", "pe_num" and "pe_number", and sized as 16, 32 and 64bit uints depending on where you look. This is annoying and potentially misleading in cases such as the OPAL API, where different calls have different int sizes even though the PE number they want is the same. Fix this by making *everything* uint64_t pe_number. In doing this, there are some whitespace fixes and mve_number gets dragged into this as well for cases like set_msi_{32/64} where they essentially mean the same thing. Signed-off-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/nvram: add support for skiboot config stringsOliver O'Halloran2016-08-301-0/+2
| | | | | | | | | | | | This allows the ibm,skiboot partition to be used to store NUL terminated key=value OF configuration strings. These strings can be written using the nvram utility found in the linux powerpc-utils package. Currently the only use case for this is passing command line arguments to the boot kernel so only ASCII strings are supported. The 0xFF binary escaping mechanism for configuration strings is not supported. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/init: recheck nvram on fast rebootOliver O'Halloran2016-08-301-0/+1
| | | | | | | | | If the previously running OS modifies the NVRAM it may be left in an invalid state. To prevent errors we need to re-validate the nvram format in the fast-reboot path. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* nvram: rename nvram-format.h to nvram.hOliver O'Halloran2016-08-301-3/+3
| | | | | | | | | | The NVRAM handling code was split into two files so that the partition parsing could be separately tested. Currently there is no nvram.h and the tests #include nvram-format.c directly. This patch renames nvram-format.h to something more sensible. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* FSP/ELOG: Remove redundant elog stateVasant Hegde2016-08-261-1/+0
| | | | | | | | | | | | | | | OPAL gets elog notification from service processor which contains log information. Once we get notification we start reading log data and change elog state to ELOG_STATE_FETCHING. Hence we don't need ELOG_STATE_FETCHED_INFO state. Lets remove this variable. Also in some places we have used this state after sending event information to host. Replace such usage with better state (ELOG_STATE_HOST_INFO). Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* flash: Rework error paths and messages for multiple flash controllersMichael Neuling2016-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | The current flash code was written with only one flash chip, which is a system_flash (ie. the PNOR image), in mind. Now that we have mambo bogusdisk flash, we can have many flash chips. This is resulting in some confusing output messages. This reworks some of the error paths and warnings to make this more coherent when we have multiple flash chips. We assume everything can be a system flash, so I've removed the is_system_flash parameter from flash_register(). We'll use the first system flash we find and warn if we find another since discovery order is not a guaranteed API. Signed-off-by: Michael Neuling <mikey@neuling.org> Acked-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* lpc: Log LPC SYNC errors as unrecoverable ones for manufacturingVipin K Parashar2016-08-252-0/+3
| | | | | | | | | | | | | High volume of SYNC errors onto LPC bus cause degraded system performance and are likely due to bad hardware present onto system. Thus once LPC SYNC errors cross a certain threshold, OPAL should log them onto BMC as unrecoverable errors in manufacturing mode. This will help manufacturing screen bad parts, causing such errors. Cc: stable Signed-off-by: Vipin K Parashar <vipin@linux.vnet.ibm.com> [stewart@linux.vnet.ibm.com: s/mfg/manufacturing/] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Make console-log time more readable: seconds rather than timebaseBalbir Singh2016-08-241-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've tried to align it with what the kernel prints today The existing logs show: [20287269125,5] PSI[0x000]: Found PSI bridge [working=1, active=0] [890425679,5] BT: Interface initialized, IO 0x00e4 [1249199642,4] SLW: HB-provided idle states property found [1249344409,5] NVRAM: Size is 576 KB [1484422964,3] NVRAM: Layout appears sane The mftb() output is not very meaningful, the changed output shows: [ 38.315784591,5] CENTAUR: FSI host: 0x0 cMFSI0 port 2 [ 38.315922971,5] PSI[0x000]: Found PSI bridge [working=1, active=0] [ 1.448765255,5] BT: Interface initialized, IO 0x00e4 [ 2.398136129,5] NVRAM: Size is 576 KB [ 3.145017865,3] NVRAM: Layout appears sane For the output sample, I've taken bits where one can see the time move back w.r.t. previous log, but that was always the case. I don't think that is worth fixing here Adds an additional divide and modulo for every log printed. I've also fixed the test cases that run as a part of make check Signed-off-by: Balbir Singh <bsingharora@gmail.com> [stewart@linux.vnet.ibm.com: fix up tb in console tests] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* chip: Add a quirk for when core direct control XSCOMs are missingBenjamin Herrenschmidt2016-08-221-0/+1
| | | | | | | | Those will be needed by fast reboot. For now, mark qemu and mambo as not having them. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* cpu: Add support for nap mode on P8Benjamin Herrenschmidt2016-08-221-0/+4
| | | | | | | | | | | This allows us to send threads to nap mode when either idle (waiting for a job) or when in a sleep delay (time_wait*). We only enable the functionality after the 0x100 vector has been patched, and we disable it before transferring control to Linux. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* cpu: Remove global job queueBenjamin Herrenschmidt2016-08-221-0/+2
| | | | | | | | | | | | | | Instead, target a specific CPU for a global job at queuing time. This will allow us to wake up the target using an interrupt when implementing nap mode. The algorithm used is to look for idle primary threads first, then idle secondaries, and finally the less loaded thread. If nothing can be found, we fallback to a synchronous call. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* cpu: Add cpu_idle() which we call when waiting for a jobBenjamin Herrenschmidt2016-08-221-0/+7
| | | | | | | For now a simple generic implementation using cpu_relax() Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* cpu: Add cpu_check_jobs()Benjamin Herrenschmidt2016-08-221-0/+2
| | | | | | | | Wrapper around list_empty_nocheck() to see if there's any job pending on a given CPU Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* cpu: Remove unused cpu_free_job()Benjamin Herrenschmidt2016-08-221-3/+0
| | | | | Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* interrupts: Rename icp_prep_for_rvwinkle to icp_prep_for_pmBenjamin Herrenschmidt2016-08-221-1/+1
| | | | | Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Rename rvwinkle patch to reset patch and install at bootBenjamin Herrenschmidt2016-08-221-0/+4
| | | | | | | | | | The patch code itself is unchanged (for now...). Install it during boot so we will be able to use power management instructions. We can't just have a proper exception code built at 0x100 as this is otherwise one of our entry points. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Rename enter_rvwinkle to enter_pm_stateBenjamin Herrenschmidt2016-08-221-0/+2
| | | | | | | And add an argument to specify whether to enter nap or rvwinkle Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Add infrastructure for pointer validation.Balbir Singh2016-08-122-0/+25
| | | | | | | | | | | | | | If the kernel called an OPAL API with vmalloc'd address or any other address range in real mode, we would hit a problem with aliasing. Since the top 4 bits are ignored in real mode, pointers from 0xc.. and 0xd.. (and other ranges) could collide and lead to hard to solve bugs. This patch adds the infrastructure for pointer validation and a simple test case for testing the API Signed-off-by: Balbir Singh <bsingharora@gmail.com> [stewart@linux.vnet.ibm.com: move function to opal-internal.h rather than opal-api.h] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* lpc: Add routing support for SerIRQsBenjamin Herrenschmidt2016-08-111-0/+3
| | | | | | | | We can route them to any of 4 PSI interrupts. We use the device-tree to determine the default routing Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* lpc: Move LPC instance variables to a private structureBenjamin Herrenschmidt2016-08-112-9/+2
| | | | | | | | Take them out of struct proc_chip and into a private struct lpcm that's local to lpc.c Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* psi: Remove psi->workingBenjamin Herrenschmidt2016-08-111-1/+0
| | | | | | | I was only ever set to true Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* lpc: Add P9 LPC interrupts supportBenjamin Herrenschmidt2016-08-111-0/+7
| | | | | | | | We currently don't exploit the new MUX that allow to spread them around different PSI interrupts, they all go to LPC#0 Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* psi: Add P9 supportBenjamin Herrenschmidt2016-08-112-2/+39
| | | | | | | | This reworks interrupt handling a bit and adds support for XIVE based interrupts and the new sources available on POWER9. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* xive: Wrap irq_sources to provide standard set_xive/get_xiveBenjamin Herrenschmidt2016-08-111-2/+9
| | | | | | | | | | | | | | | | All the source controllers use the standard XIVE mechanism for masking/unmasking and EOI, so there is no point having that logic duplicated. There are a few variations on how they are implemented but that can be handled using a few flags. So let's create a wrapper around irq_sources for a xive source and provide a new API for things like PHB4 to instanciate them This patch while at it also fixes the calculation of the source offset when setting up targetting information in the PHB4. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* interrupts: Add new source ->attributes callbackBenjamin Herrenschmidt2016-08-111-14/+21
| | | | | | | | | | | | | | This allows a given source to provide per-interrupt attributes such as whether it targets OPAL or Linux and it's estimated frequency. The former allows to get rid of the double set of ops used to decide which interrupts go where on some modules like the PHBs and the latter will be eventually used to implement smart caching of the source lookups. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* include/errorlog.h : Renames SRC component's macro nameMukesh Ojha2016-07-281-134/+134
| | | | | | | | | | | It replaces two letter SRC components macro name with some meaningful components name to make it more legible. E.g: OPAL_XS => OPAL_SRC_COMPONENT_XSCOM Signed-off-by: Mukesh Ojha <mukesh02@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/timer: Add support for platform specific heartbeatChris Smart2016-07-221-0/+4
| | | | | | | | | | | | The timer code currently has a default and a special check for FSP machines or those with SLW timer facility. This patch adds support for platform quirk to set the timer. Signed-off-by: Chris Smart <chris@distroguy.com> Acked-by: Michael Neuling <mikey@neuling.org> [stewart@linux.vnet.ibm.com: fix whitespace issue] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* FSP/ELOG: Improve elog event statesVasant Hegde2016-07-211-0/+1
| | | | | | | | | | | | | | | | | | ELOG enables event notification once new log is available. And this will be disabled after host completes reading logs (it has to complete both fsp_opal_elog_info and fsp_opal_elog_read). Ideally we should disable notification as soon as host consumes event (after fsp_opal_elog_info). Also if host fails to call fsp_opal_elog_read (ex: situations like duplicate event), then we endup keeping notification forever. This patch introduces new ELOG state (ELOG_STATE_HOST_INFO). As soon as host consumes event elog will move to this new state so that event notification is disabled. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* FSP/ELOG: Fix OPAL generated elog event notificationVasant Hegde2016-07-211-0/+2
| | | | | | | | | | | | | | | | | We use elog notifier to notify logs from multiple sources (FSP generated logs - fsp-elog-read.c and OPAL generated logs - fsp-elog-write.c). OPAL generated logs sets elog event bit whenever it has new logs to send to host. But it relies on fsp-elog-read.c to disable the event bit..which is wrong! This patch creates common function to enable/disable event notification. It will enable event notification if any of the source is ready to send error log to host and disables notification once it completes sending all errors to host. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* nvlink: Associate and allocate NPUs using slotsRussell Currey2016-07-201-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allocating BDFNs to NPU devices and associating NPU devices with PCI devices of GPUs both rely on comparing PBCQ handles. This will fail if a system has multiple sets of GPUs behind a single PHB. Rework this to instead use slot locations. The following changes are introduced: - Groups of NPU links that connect to the same GPU are presented in the slot table entries as st_npu_slot, using ST_LOC_NPU_GROUP - NPU links are created with the ibm,npu-group-id property replacing the ibm,pbcq property, which is used in BDFN allocation and GPU association - Slot comparison is handled slightly differently for NPU devices as the function of the BDFN is ignored, since the device number represents the physical GPU the link is connected to - BDFN allocation for NPU devices is now derived from the groups in the slot table. For Garrison, the same BDFNs are generated as before. - Association with GPU PCI devices is performed by comparing the slot label. This means for future machines with NPUs that slot labels are compulsory to have NVLink functionality working. Signed-off-by: Russell Currey <ruscur@russell.cc> Reviewed-By: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Allow mtspr/mfspr to compile indepedantly of the optimization levelBalbir Singh2016-07-191-2/+4
| | | | | | | | | | | | | | | The compiler expects to see a constant value in the asm operations involving spr's. When compiling with -O0, spr is treated as a variable on stack when inline (this can be seen from the RTL). We do two things to fix the issue, we mark the functions as always_inline and we pass spr as a const so that the value is propagated as constants to the inline asm statement Tested with -O0 Signed-off-by: Balbir Singh <bsingharora@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* errorlog : Typo mistakeMukesh Ojha2016-07-141-1/+1
| | | | | | | componenet => component Signed-off-by: Mukesh Ojha <mukesh02@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Reassign duplicate error log component IDs to free onesStewart Smith2016-07-141-2/+2
| | | | | | | | Since these were unused, it's safe to just reassign them and not change anything we expose to anyone. Reported-by: Mukesh Ojha <mukesh02@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Re-order error log component ID defines to be in orderStewart Smith2016-07-141-14/+14
| | | | | | | This makes the (two) duplicates easier to spot Reported-by: Mukesh Ojha <mukesh02@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* cpu: Don't call time_wait with lock heldBenjamin Herrenschmidt2016-07-131-0/+1
| | | | | | | | | Also make the locking around re-init safer, properly block the OS from restarting a thread that was caught for re-init. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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